aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2011-04-01whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-01Issue libcalls __udivmod*i4 / __divmod*i4 for div / rem pairs.Evan Cheng
rdar://8911343 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128696 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-01Remove unused variablesMatt Beaumont-Gay
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128692 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix Thumb and Thumb2 tests to be register allocator independent.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Apply again changes to support ARM memory asm parsing. I removedBruno Cardoso Lopes
all LDR/STR changes and left them to a future patch. Passing all checks now. - Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and fix the encoding wherever is possible. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31The basic register allocator must also use the inline spiller.Jakob Stoklund Olesen
It is using a trivial rewriter that doesn't know how to insert spill code requested by the standard spiller. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128688 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Provide a legal pointer register class when targeting thumb1.Jakob Stoklund Olesen
The LocalStackSlotAllocation pass was creating illegal registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix SystemZ testsJakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Instcombile optimization: extractelement(cast) -> cast(extractelement)Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix ARM tests to be register allocator independent.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128680 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: APFloat can't perform arithmetic on PPC double doubles, don't ↵Benjamin Kramer
even try. Thanks Eli! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128676 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Add a test case for a malformed LDC/LDC2 instructions with PUDW = 0b0000, whichJohnny Chen
amounts to an UNDEFINED instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128668 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplierEvan Cheng
accumulator forwarding: vadd d3, d0, d1 vmul d3, d3, d2 => vmul d3, d0, d2 vmla d3, d1, d2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix single word and unsigned byte data transfer instruction encodings so thatJohnny Chen
Inst{4} = 0. rdar://problem/9213022 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128662 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix Mips, Sparc, and XCore tests that were dependent on register allocation.Jakob Stoklund Olesen
Add an extra run with -regalloc=basic to keep them honest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Added support for FP conditional move instructions and fixed bugs in ↵Akira Hatanaka
handling of FP comparisons. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128650 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Pick better examples. "fpext float 3.1415 to double" won't parse because 3.1415Nick Lewycky
isn't an exact float. Also "fpext float 1.0 to float" is invalid IR because it's not performing an extension. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Don't completely eliminate identity copies that also modify super register ↵Jakob Stoklund Olesen
liveness. Turn them into noop KILL instructions instead. This lets the scavenger know when super-registers are killed and defined. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Add BLXi to the instruction table for disassembly purpose.Johnny Chen
A8.6.23 BLX (immediate) rdar://problem/9212921 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Allow kill flags on two-address instructions. They are harmless.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Mark all uses as <undef> when joining a copy.Jakob Stoklund Olesen
This way, shrinkToUses() will ignore the instruction that is about to be deleted, and we avoid leaving invalid live ranges that SplitKit doesn't like. Fix a misunderstanding in MachineVerifier about <def,undef> operands. The <undef> flag is valid on def operands where it has the same meaning as <undef> on a use operand. It only applies to sub-register defines which also read the full register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Remove stray empty test file.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Remove dead code.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Revert r128632 again, until I figure out what break the testsBruno Cardoso Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix bug found by valgrind.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128634 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Add XCore intrinsics for initializing / starting / synchronizing threads.Richard Osborne
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128633 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Reapply r128585 without generating a lib depedency cycle. An updated log:Bruno Cardoso Lopes
- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and {STR,LDC}{2}_{PRE,POST} fixing the encoding wherever is possible. - Move all instructions which use am2offset without a pattern to use addrmode2. - Add a new encoding bit to describe the index mode used and teach printAddrMode2Operand to check by the addressing mode which index mode to print. - Testcases git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128632 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix whitespace.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Switch FileRemover from PathV1 to V2.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31lib/CodeGen/LiveIntervalAnalysis.cpp: [PR9590] Don't use ↵NAKAMURA Takumi
std::pow(float,float) here. We don't expect the real "powf()" on some hosts (and powf() would be available on other hosts). For consistency, std::pow(double,double) may be called instead. Or, precision issue might attack us, to see unstable regalloc and stack coloring. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128629 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: Fix transform to use the swapped predicate.Benjamin Kramer
Thanks Frits! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128628 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: fold fcmp (fneg x), (fneg y) -> fcmp x, yBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128627 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: fold fcmp pred (fneg x), C -> fcmp swap(pred) x, -CBenjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: Shrink "fcmp (fpext x), C" to "fcmp x, C" if C can be ↵Benjamin Kramer
losslessly converted to the type of x. Fixes PR9592. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31InstCombine: fold fcmp (fpext x), (fpext y) -> fcmp x, y.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Will not compile without the spec!Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Strip trailing whitespace.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Testcase for r128619 (PR9571).Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128620 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Pick a conservative register class when creating a small live range for remat.Jakob Stoklund Olesen
The rematerialized instruction may require a more constrained register class than the register being spilled. In the test case, the spilled register has been inflated to the DPR register class, but we are rematerializing a load of the ssub_0 sub-register which only exists for DPR_VFP2 registers. The register class is reinflated after spilling, so the conservative choice is only temporary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128610 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Revert "- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT and"Matt Beaumont-Gay
This revision introduced a dependency cycle, as nlewycky mentioned by email. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128597 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Fix typo in generated HTML.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128594 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-31Use intrinsics for Neon vmull operations. Radar 9208957.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128591 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Somehow we managed to forget to encode the lane index for a large swathe of ↵Owen Anderson
NEON instructions. With this fix, the entire test-suite passes with the Thumb integrated assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Don't try to create zero-sized stack objects.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128586 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30- Implement asm parsing support for LDRT, LDRBT, STRT, STRBT andBruno Cardoso Lopes
{STR,LDC}{2}_PRE. - Fixed the encoding in some places. - Some of those instructions were using am2offset and now use addrmode2. Codegen isn't affected, instructions which use SelectAddrMode2Offset were not touched. - Teach printAddrMode2Operand to check by the addressing mode which index mode to print. - This is a work in progress, more work to come. The idea is to change places which use am2offset to use addrmode2 instead, as to unify assembly parser. - Add testcases for assembly parser git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128585 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Add a ARM-specific SD node for VBSL so that forms with a constant first operandCameron Zwarich
can be recognized. This fixes <rdar://problem/9183078>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128584 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Tidy up. Whitespace and 80-columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128583 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30* The DSE code that tested for overlapping needed to take into account the factBill Wendling
that one of the numbers is signed while the other is unsigned. This could lead to a wrong result when the signed was promoted to an unsigned int. * Add the data layout line to the testcase so that it will test the appropriate thing. Patch by David Terei! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128577 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30fixed typoAkira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128574 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-30Don't add the same analysis implementation pair twice.Jakob Stoklund Olesen
Prevent infinite growth of the list. Patch by José Fonseca! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128568 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-05 15:39:20 +0000