aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2010-10-30move some code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117816 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30implement (and document!) the first kind of MC assembler alias, which Chris Lattner
just remaps one mnemonic to another. Convert a few of the X86 aliases from .cpp to .td code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30add a test for the ud2a alias.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117803 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Now that the MallocInst no longer exists, this workaround forDuncan Sands
it claiming not to have side-effects is no longer needed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117789 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Allow specifying a CPU to llvm-mc, so that we can properly set up subtargetJim Grosbach
feature lists for instruction pattern predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117788 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Add FIXME.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117787 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Clean up comments.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117785 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-3080 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117784 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30If a function does a volatile load from a global constant, do notDuncan Sands
consider it to be readonly. In fact, don't even consider it to be readonly if it does a volatile load from an AllocaInst either (it is debatable as to whether readonly would be correct or not in this case; play safe for the moment). This fixes PR8279. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117783 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Tidy up.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117782 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Rename alignof -> alignOf to avoid irritating C++'0x compilers,Chris Lattner
PR8423, patch by nobled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117774 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30stay out of the reserved namespaceChris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117773 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30simplify this code.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117771 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30split MaybeParseRegister into its two logical uses, eliminating malloc+free ↵Chris Lattner
traffic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117769 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Avoid re-evaluating MI.getNumOperands() every iteration of the loop.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117766 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Include MachineBasicBlock numbers in viewCFG() output.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117765 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Make sure copies are inserted after any exception handling labels at the top ofJakob Stoklund Olesen
a basic block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117764 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Add SkipPHIsAndLabels from PHIElimination to MachineBasicBlock. It is neededJakob Stoklund Olesen
elsewhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117763 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Disable more of physical register live intervals verification.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117762 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Print out register class of spilled register.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117761 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Overhaul memory barriers in the ARM backend. Radar 8601999.Bob Wilson
There were a number of issues to fix up here: * The "device" argument of the llvm.memory.barrier intrinsic should be used to distinguish the "Full System" domain from the "Inner Shareable" domain. It has nothing to do with using DMB vs. DSB instructions. * The compiler should never need to emit DSB instructions. Remove the ARMISD::SYNCBARRIER node and also remove the instruction patterns for DSB. * Merge the separate DMB/DSB instructions for options only used for the disassembler with the default DMB/DSB instructions. Add the default "full system" option ARM_MB::SY to the ARM_MB::MemBOpt enum. * Add a separate ARMISD::MEMBARRIER_MCR node for subtargets that implement a data memory barrier using the MCR instruction. * Fix up encodings for these instructions (except MCR). I also updated the tests and added a few new ones to check for DMB options that were not currently being exercised. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117756 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Add polly support to the build system.Tobias Grosser
Update the cmake and autoconf build system to compile polly as a shared library if it is checked out into tools/polly. In case polly is not checked out, nothing changes. This models the way clang can be added to llvm if checked out to tools/clang. Also rebuild configure. Patch contributed by ether. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117755 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30Encode the register list operands for ARM mode LDM/STM instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117753 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Some instructions end with an "ls" prefix, but it doesn't indicate that they areBill Wendling
conditional. Check for those instructions explicitly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117747 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Mult-alt constraint incremental development step 3.John Thompson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117746 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Teach machine cse to eliminate instructions with multiple physreg uses and ↵Evan Cheng
defs. rdar://8610857. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Remove hard tab characters.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117742 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-2980 column fix.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117741 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29trailing whitespaceJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117740 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29s/getNEONVcvtImm32/getNEONVcvtImm32OpValue/ to be consistent with other operandJim Grosbach
encoder functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117738 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Fix fpscr <-> GPR latency info.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117737 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Be more strict on when we produce an undefined reference. In gas a file withRafael Espindola
just .type foo,@object will produce an undefined reference to foo. On the other hand, a file with just .weakref bar, foo will not. It is somewhat hard to support both in MC since both statements should create the symbols. It should be possible if we really need to by adding to the flags, but hopefully that is not necessary. With this patch we do not produce a undefined reference in any of those cases. The assembly file needs an actual use for the undefined reference to be present. This is in preparation for a patch implementing .weakref. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117735 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Apply a patch from Frits van Bommel to fix the CMake build.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117731 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Clean up indentation and other whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117728 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Remove trailing whitespace.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117727 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29trailing whitespaceJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117724 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Fix 80-column violation.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117722 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Change instcombine's getShuffleMask to represent undef with negative values.Bob Wilson
This code had previously used 2*N, where N is the mask length, to represent undef. That is not safe because the shufflevector operands may have more than N elements -- they don't have to match the result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117721 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Remove DAG combiner patch to fold vector splats. Instcombiner does it now.Bob Wilson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117720 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Make instcombine a little more aggressive in combining vector shuffles.Bob Wilson
Allow splats even if they don't match either of the original shuffles, possibly due to undef entries in the shuffles masks. Radar 8597790. Also fix some 80-column violations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117719 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29add FIXMEJim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117718 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Convert ARM::MOVi2pieces to a true pseudo-instruction and expand it inJim Grosbach
the ARMExpandPseudos pass rather than during the asm lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117714 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Update testcase since we're no longer doing the constant forwarding inline ↵Owen Anderson
with correlated value propagation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117712 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Handle comparison values we already have - this fixes the consumer-typesetEric Christopher
failure for llvm-gcc on arm fast isel. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117710 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Give up on doing in-line instruction simplification during correlated value ↵Owen Anderson
propagation. Instruction simplification needs to be guaranteed never to be run on an unreachable block. However, earlier block simplifications may have changed the CFG to make block that were reachable when we began our iteration unreachable by the time we try to simplify them. (Note that this also means that our depth-first iterators were potentially being invalidated). This should not have a large impact on code quality, since later runs of instcombine should pick up these simplifications. Fixes PR8506. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117709 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Convert this test to .s form.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117708 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29ARM::MOVi32imm is expanded in ARMExpandPseudoInsts, so there's no need toJim Grosbach
handle it in the asm lowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117707 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Convert this test to .s form.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117704 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29Fix typo.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117703 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-29ARM encoding information for CLREX, SWP and SWPB. Add comment for sjlj ↵Jim Grosbach
pseudos and a FIXME for TLS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117702 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-04 11:59:20 +0000