aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-09-12Add support for AMD Geode.Roman Divacky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163710 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Fix constant folding through bitcasts by no longer relying on undefined ↵Kristof Beyls
behaviour (converting NaN values between float and double). SelectionDAG::getConstantFP(double Val, EVT VT, bool isTarget); should not be used when Val is not a simple constant (as the comment in SelectionDAG.h indicates). This patch avoids using this function when folding an unknown constant through a bitcast, where it cannot be guaranteed that Val will be a simple constant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163703 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Add a flag to disable the code that looks for allocas which escaped the ↵Nadav Rotem
lifetime regions. This is useful for debugging. No testcase because without this check we fail on assertions when finding escaped allocas. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163702 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Add a function computeRegisterLiveness() to MachineBasicBlock. This uses ↵James Molloy
analyzePhysReg() from r163694 to heuristically try and determine the liveness state of a physical register upon arrival at a particular instruction in a block. The search for liveness is clipped to a specific number of instructions around the target MachineInstr, in order to avoid degenerating into an O(N^2) algorithm. It tries to use various clues about how instructions around (both before and after) a given MachineInstr use that register, to determine its state at the MachineInstr. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163695 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Add an analyzePhysReg() function to MachineOperandIteratorBase that analyses ↵James Molloy
an instruction's use of a physical register, analogous to analyzeVirtReg. Rename RegInfo to VirtRegInfo so as not to be confused with the new PhysRegInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163694 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12When calling print directly on a global (eg from the debugger) itDuncan Sands
was printing a newline that doesn't occur when printing other kinds of LLVM values. Move the printing of that newline elsewhere, making globals print the same as other values while leaving the output when printing an entire module unchanged. Patch by Saša Tomić. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163693 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Enable stack-coloring, in hope that the recent fixes will enable correct ↵Nadav Rotem
dragonegg self-hosting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163687 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Make findLastUseBefore handle reg-unit liveness.Lang Hames
findLastUseBefore was previous considering virtreg liveness only, leading to incorrect live intervals for reg units when instrs with physreg operands were moved up. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163685 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Indentation fixes. No functional change.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163682 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Release build: guard dump functions withManman Ren
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" No functional change. Update r163344. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163679 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Stack coloring: remove lifetime intervals which contain escaped allocas.Nadav Rotem
The input program may contain intructions which are not inside lifetime markers. This can happen due to a bug in the compiler or due to a bug in user code (for example, returning a reference to a local variable). This commit adds checks that all of the instructions in the function and invalidates lifetime ranges which do not contain all of the instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163678 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-12Add some support for dealing with an object pointer on arguments.Eric Christopher
Part of rdar://9797999 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163667 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Improve tblgen code cleanliness: create an unknown_class, from which the ↵Owen Anderson
unknown def inherits. Make tblgen check for that class, rather than checking for the def itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163664 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Compute a map from register names to registers, rather than scanning the ↵Owen Anderson
list of registers every time we want to look up a register by name. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163659 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add documentation.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163658 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add a few virtual functions to the abstract MCParsedAsmOperand class.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163655 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Rename the isMemory() function to isMem(). No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163654 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Release build: guard dump functions withManman Ren
"#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)" No functional change. Update r163339. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163653 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11StringSwitchify.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163649 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Simplify logic. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163648 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11[ms-inline asm] Split the parsing of IR asm strings into GCC and MS variants.Chad Rosier
Add support in the EmitMSInlineAsmStr() function for handling integer consts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163645 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11SimplifyCFG: preserve branch-weight metadata when creating a new switch fromManman Ren
a pair of switch/branch where both depend on the value of the same variable and the default case of the first switch/branch goes to the second switch/branch. Code clean up and fixed a few issues: 1> handling the case where some cases of the 2nd switch are invalidated 2> correctly calculate the weight for the 2nd switch when it is a conditional eq Testing case is modified from Alastair's original patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163635 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add TRI::getSubRegIndexLaneMask().Jakob Stoklund Olesen
Sub-register lane masks are bitmasks that can be used to determine if two sub-registers of a virtual register will overlap. For example, ARM's ssub0 and ssub1 sub-register indices don't overlap each other, but both overlap dsub0 and qsub0. The lane masks will be accurate on most targets, but on targets that use sub-register indexes in an irregular way, the masks may conservatively report that two sub-register indices overlap when the eventually allocated physregs don't. Irregular register banks also mean that the bits in a lane mask can't be mapped onto register units, but the concept is similar. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163630 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Clean the sub-reg index composition maps at emission.Jakob Stoklund Olesen
Preserve the Composites map in the CodeGenSubRegIndex class so it can be used to determine which sub-register indices can actually be composed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163629 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add MCRI::getNumSubRegIndices() and start checking SubRegIndex ranges.Jakob Stoklund Olesen
Apparently, NumSubRegIndices was completely unused before. Adjust it by one to include the null subreg index, just like getNumRegs() includes the null register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163628 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Formatting. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163627 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Dragonegg selfhost exposed additional cases where alloca usage moved outside ↵Nadav Rotem
of lifetime markers. Disabling the pass for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163623 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Enable stack coloring.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163617 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Stack Coloring: Dont crash on dbg values which use stack frames.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163616 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11CMake toolchain file for Android NDK.Evgeniy Stepanov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163612 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add IRC handle.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163601 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Make a bunch of lowering helper functions static instead of member ↵Craig Topper
functions. No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163596 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Change unsigned to a uint16_t in static disassembler tables to reduce the ↵Craig Topper
table size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163594 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11llvm/lib/Transforms/Utils/CMakeLists.txt: Update.NAKAMURA Takumi
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163593 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add a pass that renames everything with metasyntatic names. This works well ↵Alex Rosenberg
after using bugpoint to reduce the confusion presented by the original names, which no longer mean what they used to. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163592 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Teach DAG combiner to constant fold FABS of a BUILD_VECTOR of ConstantFPs. ↵Craig Topper
Factor similar code out of FNEG DAG combiner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163587 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Add support for finding cacheflush on OpenBSD/mips64 platforms.Chandler Carruth
Patch by Brad Smith! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163584 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Reorganize MachineScheduler interfaces and publish them in the header.Andrew Trick
The Hexagon target decided to use a lot of functionality from the target-independent scheduler. That's fine, and other targets should be able to do the same. This reorg and API update makes that easy. For the record, ScheduleDAGMI was not meant to be subclassed. Instead, new scheduling algorithms should be able to implement MachineSchedStrategy and be done. But if need be, it's nice to be able to extend ScheduleDAGMI, so I also made that easier. The target scheduler is somewhat more apt to break that way though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163580 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-11Remove unused declarationAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163579 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Revert r160148 it seems to cause more problems than it shouldEric Christopher
right now. We'll fix PR13303 a different way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163570 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-1080-col fixup.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163569 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-1080-col fixup.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163568 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10No reason to construct this twice.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163567 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Add newline.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163565 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Update function names to conform to guidelines. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163561 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Revert r163556. Missed updates to tablegen files.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163557 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Update function names to conform to guidelines. No functional change intended.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163556 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10test/CodeGen/X86/ms-inline-asm.ll: Relax for non-darwin x86 targets. ↵NAKAMURA Takumi
'##InlineAsm' could not be seen in other hosts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163554 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10[ms-inline asm] Properly emit the asm directives when the AsmPrinterVariantChad Rosier
and InlineAsmVariant don't match. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163550 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-10Update test case for Release builds.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163549 91177308-0d34-0410-b5e6-96231b3b80d8