aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2012-05-04A pile of long over-due refactorings here. There are some very, *very*Chandler Carruth
minor behavior changes with this, but nothing I have seen evidence of in the wild or expect to be meaningful. The real goal is unifying our logic and simplifying the interfaces. A summary of the changes follows: - Make 'callIsSmall' actually accept a callsite so it can handle intrinsics, and simplify callers appropriately. - Nuke a completely bogus declaration of 'callIsSmall' that was still lurking in InlineCost.h... No idea how this got missed. - Teach the 'isInstructionFree' about the various more intelligent 'free' heuristics that got added to the inline cost analysis during review and testing. This mostly surrounds int->ptr and ptr->int casts. - Switch most of the interesting parts of the inline cost analysis that were essentially computing 'is this instruction free?' to use the code metrics routine instead. This way we won't keep duplicating logic. All of this is motivated by the desire to allow other passes to compute a roughly equivalent 'cost' metric for a particular basic block as the inline cost analysis. Sadly, re-using the same analysis for both is really messy because only the actual inline cost analysis is ever going to go to the contortions required for simplification, SROA analysis, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156140 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Add a FoldingSetVector datastructure which is analogous to a SetVector,Chandler Carruth
but using a FoldingSet underneath and with a largely compatible interface to that of FoldingSet. This can be used anywhere a FoldingSet would be natural, but iteration order is significant. The initial intended use case is in Clang's template specialization lists to preserve instantiation order iteration. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156131 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03PR12729: Change 'llvm-objdump' to display the available targets.Pete Cooper
Patch by Meador Inge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Remove accidentally added file.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156124 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Use a shared implementation of getMatchingSuperRegClass().Jakob Stoklund Olesen
TargetRegisterClass now gives access to the necessary tables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Add TargetRegisterClass::getSuperRegIndices().Jakob Stoklund Olesen
This is a pointer into one of the tables used by getMatchingSuperRegClass(). It makes it possible to use a shared implementation of that function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Emit SuperRegMasks as part of the existing SubClassMask arrays.Jakob Stoklund Olesen
The RC->getSubClassMask() pointer now points to a sequence of register class bit masks. The first bit mask is the normal sub-class mask. The following masks are super-reg class masks used by getMatchingSuperRegClass(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156120 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby
for the assembler and disassembler. Which were not being set/read correctly for offsets greater than 22 bits in some cases. Changes to lib/Target/ARM/ARMAsmBackend.cpp from Gideon Myles! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Factor the logic for testing whether a basic block is viable for codeChandler Carruth
extraction into a public interface. Also clean it up and apply it more consistently such that we check for landing pads *anywhere* in the extracted code, not just in single-block extraction. This will be used to guide decisions in passes that are planning to eventually perform a round of code extraction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156114 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03remove calls to calloc if the allocated memory is not used (it was already ↵Nuno Lopes
being done for malloc) fix a few typos found by Chad in my previous commit git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156110 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Support for target dependent Hexagon VLIW packetizer.Sirish Pande
This patch creates and optimizes packets as per Hexagon ISA rules. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156109 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Add rudimentary CMake logic for detecting Graphviz.Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156108 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03add support for calloc to objectsize loweringNuno Lopes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Fix the type of SubClassMask.Jakob Stoklund Olesen
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156084 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Compress tables for getMatchingSuperRegClass().Jakob Stoklund Olesen
Many register classes only have a few super-registers, so it is not necessary to keep individual bit masks for all possible sub-register indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156083 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Add the half type to the LLVM IR vim syntax highlighting.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156077 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Don't override subreg functions in targets without subregisters.Jakob Stoklund Olesen
Some targets have no sub-registers at all. Use the TargetRegisterInfo versions of composeSubRegIndices(), getSubClassWithSubReg(), and getMatchingSuperRegClass() for those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156075 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Extensions of Hexagon V4 instructions.Sirish Pande
This adds new instructions for Hexagon V4 architecture. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156071 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03replace 'break's with 'return 0' in visitCallInst code for objectsize, since ↵Nuno Lopes
there is no need to fallback to visitCallSite. This gives a 0.9% in a test case git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156069 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Use correct variable in this example. Pointed out by waynix on IRC.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156067 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Use 'unsigned' instead of 'int' in a few places dealing with counts of ↵Craig Topper
vector elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156060 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the ↵Craig Topper
lower half correctly. Missed in r155982. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156059 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Fix two-address pass's aggressive instruction commuting heuristics. It's meantEvan Cheng
to catch cases like: %reg1024<def> = MOV r1 %reg1025<def> = MOV r0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 By commuting ADD, it let coalescer eliminate all of the copies. However, there was a bug in the heuristics where it ended up commuting the ADD in: %reg1024<def> = MOV r0 %reg1025<def> = MOV 0 %reg1026<def> = ADD %reg1024, %reg1025 r0 = MOV %reg1026 That did no benefit but rather ensure the last MOV would not be coalesced. rdar://11355268 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156048 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-03Added TargetRegisterInfo::getAllocatableClass.Andrew Trick
The ensures that virtual registers always belong to an allocatable class. If your target attempts to create a vreg for an operand that has no allocatable register subclass, you will crash quickly. This ensures that targets define register classes as intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156046 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Whitespace cleanup.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156034 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02[docs] Include the Kaleidescope tutorial in the Sphinx docs build.Daniel Dunbar
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156032 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, ↵Owen Anderson
just like it now knows for FMULs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156029 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02For Intel Atom, use ILP scheduling always, instead of ILP for 64 bitPreston Gurd
and Hybrid for 32 bit, since benchmarks show ILP scheduling is better most of the time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156028 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Change the Intel Atom detection code to recognizePreston Gurd
Lincroft and Medfield. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156025 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Teach DAG combine that multiplication by 1.0 can always be constant folded.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156023 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Add tools/lld to .gitignore.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156021 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02ARM: Add missing two-operand VBIC aliases.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156019 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Move llvm-tblgen's StringMatcher into the TableGen library so it canDouglas Gregor
be used by clang-tblgen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156000 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02[llvm-c] Make a few function declarations proper prototypesAnders Waldenborg
This avoids warnings when included in a application that uses -Wstrict-prototypes. e.g: AsmPrinters.def:27:1: warning: function declaration isn't a prototype [-Wstrict-prototypes] git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155997 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02This patch continues the work of adding instruction latencies for X86 Atom,Preston Gurd
by providing the latencies for the instructions in X86InstrFPStack.td. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155996 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Revert r155853Manman Ren
The commit is intended to fix rdar://10961709. But it is the root cause of PR12720. Revert it for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155992 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02[tsan] typo and style (thanks to Nick Lewycky)Kostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155986 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02The value held in the vector may be RAUW'ed by some of the canonicalizationBill Wendling
methods. Use a weak value handle to keep up with this. PR12245 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155984 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Disallow YIELD and other allocated nop hints in pre-ARMv6 architectures.Richard Barton
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155983 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Add support for selecting AVX2 vpshuflw and vpshufhw. Add decoding support ↵Craig Topper
for AsmPrinter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155982 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Update SmallVector to support move semantics if the host does.John McCall
Note that support for rvalue references does not imply support for the full set of move-related STL operations. I've preserved support for an odd little thing in insert() where we're trying to support inserting a new element from an existing one. If we actually want to support that, there's a lot more we need to do: insert can call either grow or push_back, neither of which is safe against this particular use pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155979 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Fix unintentional use of operator bool.John McCall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155978 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-02Fix the implementation of MachOObjectFile::isSectionZeroInit so it follows ↵Eli Friedman
the MachO spec. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155976 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Tidy up. Naming conventions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155960 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Remove unneeded break.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155959 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Use dyn_cast instead of checking opcode and cast.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155957 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Remove trailing spaces.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155956 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Strip the pointer casts off of allocas so that the selection DAG can find them.Bill Wendling
PR10799 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-05-01Target independent Hexagon Packetizer fix.Sirish Pande
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155947 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-09 01:15:00 +0000