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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129720 91177308-0d34-0410-b5e6-96231b3b80d8
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small heap-allocated SmallString because it unconditionally forces a malloc.
(Revised version of r129688, with the necessary flush() call.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129716 91177308-0d34-0410-b5e6-96231b3b80d8
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each instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129715 91177308-0d34-0410-b5e6-96231b3b80d8
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the spilled register.
This is quite common on ARM now that some stores have early-clobber defines.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129714 91177308-0d34-0410-b5e6-96231b3b80d8
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superclass variable is instantiated properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129713 91177308-0d34-0410-b5e6-96231b3b80d8
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registers for fast allocation a different way. This has us updating
used registers only when we're using that exact register.
Fixes rdar://9207598
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129711 91177308-0d34-0410-b5e6-96231b3b80d8
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silences Clang's -Wunused-function when building in release mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129709 91177308-0d34-0410-b5e6-96231b3b80d8
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symbolic disassembly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129708 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129696 91177308-0d34-0410-b5e6-96231b3b80d8
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this fixes a few rejects on c++ iterator loops.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129694 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129693 91177308-0d34-0410-b5e6-96231b3b80d8
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the generated FastISel. X86 doesn't need to generate code to match ADD16ri8
since ADD16ri will do just fine. This is a small codesize win in the generated
instruction selector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129692 91177308-0d34-0410-b5e6-96231b3b80d8
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immediates with
value constraints on them (when defined as ImmLeaf's). This is particularly important
for X86-64, where almost all reg/imm instructions take a i64immSExt32 immediate operand,
which has a value constraint. Before this patch we ended up iseling the examples into
such amazing code as:
movabsq $7, %rax
imulq %rax, %rdi
movq %rdi, %rax
ret
now we produce:
imulq $7, %rdi, %rax
ret
This dramatically shrinks the generated code at -O0 on x86-64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129691 91177308-0d34-0410-b5e6-96231b3b80d8
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and to not rely on the register allocator's arbitrary operand choices.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129690 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129689 91177308-0d34-0410-b5e6-96231b3b80d8
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small heap-allocated SmallString because it unconditionally forces a malloc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129688 91177308-0d34-0410-b5e6-96231b3b80d8
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reduces the number of calls to malloc().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129687 91177308-0d34-0410-b5e6-96231b3b80d8
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overload that takes no parameters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129686 91177308-0d34-0410-b5e6-96231b3b80d8
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H1 ... Title (and might be Chapter in future)
H2 ... Section
H3 ... Subsection
H4 ... Sub-subsection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129683 91177308-0d34-0410-b5e6-96231b3b80d8
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little wrapper.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129680 91177308-0d34-0410-b5e6-96231b3b80d8
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since the strings are always exactly one character, and there are usually only 2-3 operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129678 91177308-0d34-0410-b5e6-96231b3b80d8
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matching code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129677 91177308-0d34-0410-b5e6-96231b3b80d8
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simplifying them and exposing more information to tblgen. It would be nice
if other target authors adopted this as well, particularly arm since it has fastisel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129676 91177308-0d34-0410-b5e6-96231b3b80d8
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kind of predicate: one that is specific to imm nodes. The predicate function
specified here just checks an int64_t directly instead of messing around with
SDNode's. The virtue of this is that it means that fastisel and other things
can reason about these predicates.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129675 91177308-0d34-0410-b5e6-96231b3b80d8
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structure and fix some fixmes. We now have a TreePredicateFn class
that handles all of the decoding of these things. This is an internal
cleanup that has no impact on the code generated by tblgen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129670 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129668 91177308-0d34-0410-b5e6-96231b3b80d8
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2. implement rdar://9289501 - fast isel should fold trivial multiplies to shifts
3. teach tblgen to handle shift immediates that are different sizes than the
shifted operands, eliminating some code from the X86 fast isel backend.
4. Have FastISel::SelectBinaryOp use (the poorly named) FastEmit_ri_ function
instead of FastEmit_ri to simplify code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129666 91177308-0d34-0410-b5e6-96231b3b80d8
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when we have a global variable base an an index. Instead, just give up on
folding the global variable.
Before we'd geenrate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
leaq (%rax), %rax
addq %rdi, %rax
movzbl (%rax), %eax
ret
now we generate:
_test: ## @test
## BB#0:
movq _rtx_length@GOTPCREL(%rip), %rax
movzbl (%rax,%rdi), %eax
ret
The difference is even more significant when there is a scale
involved.
This fixes rdar://9289558 - total fail with addr mode formation at -O0/x86-64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129664 91177308-0d34-0410-b5e6-96231b3b80d8
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less trivial things) into a dummy lea. Before we generated:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
leaq (%rax), %rax
ret
now we produce:
_test: ## @test
movq _G@GOTPCREL(%rip), %rax
ret
This is part of rdar://9289558
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129662 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129661 91177308-0d34-0410-b5e6-96231b3b80d8
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The basic issue here is that bottom-up isel is matching the branch
and compare, and was failing to fold the load into the branch/compare
combo. Fixing this (by allowing folding into any instruction of a
sequence that is selected) allows us to produce things like:
cmpb $0, 52(%rax)
je LBB4_2
instead of:
movb 52(%rax), %cl
cmpb $0, %cl
je LBB4_2
This makes the generated -O0 code run a bit faster, but also speeds up
compile time by putting less pressure on the register allocator and
generating less code.
This was one of the biggest classes of missing load folding. Implementing
this shrinks 176.gcc's c-decl.s (as a random example) by about 4% in (verbose-asm)
line count.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129656 91177308-0d34-0410-b5e6-96231b3b80d8
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which don't need to check for falling off the end of a block *and* end of phi
nodes, since terminators are never phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129655 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129654 91177308-0d34-0410-b5e6-96231b3b80d8
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allowing us to fold the immediate into the 'and' in this case:
int test1(int i) {
return 8&i;
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129653 91177308-0d34-0410-b5e6-96231b3b80d8
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Returning a new node makes the code try to replace the old node, which
in the included testcase is killed by CSE.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129650 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129644 91177308-0d34-0410-b5e6-96231b3b80d8
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with a 64-bit datalayout.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129643 91177308-0d34-0410-b5e6-96231b3b80d8
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For further information on this particular issue see: http://connect.microsoft.com/VisualStudio/feedback/details/520043/error-converting-from-null-to-a-pointer-type-in-std-pair
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129642 91177308-0d34-0410-b5e6-96231b3b80d8
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found by code inspection.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129641 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129640 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129639 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129638 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129637 91177308-0d34-0410-b5e6-96231b3b80d8
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error in foo.o; no .eh_frame_hdr table will be created.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129635 91177308-0d34-0410-b5e6-96231b3b80d8
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boundary. <rdar://problem/8933028>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129634 91177308-0d34-0410-b5e6-96231b3b80d8
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the node to a libcall. rdar://9280991
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129633 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129632 91177308-0d34-0410-b5e6-96231b3b80d8
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Break the arc-profile code out to a function like the notes emission code is,
and reorder the functions in the file.
The only functionality change is that we no longer modify the Module when the
Module has no debug info to use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129631 91177308-0d34-0410-b5e6-96231b3b80d8
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does. Also mostly implement it. Still a work-in-progress, but generates legal
output on crafted test cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129630 91177308-0d34-0410-b5e6-96231b3b80d8
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information generated for an interface.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129624 91177308-0d34-0410-b5e6-96231b3b80d8
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