aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2011-10-23Add X86 MULX instruction for disassembler.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142738 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ↵Craig Topper
multiply instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Oops! Fix test I forgot to submit as part of r142735.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22A non-escaping malloc in the entry block is not unlike an alloca. Do dead-storeNick Lewycky
elimination on them too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142735 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Make SCEV's brute force analysis stronger in two ways. Firstly, we should beNick Lewycky
able to constant fold load instructions where the argument is a constant. Second, we should be able to watch multiple PHI nodes through the loop; this patch only supports PHIs in loop headers, more can be done here. With this patch, we now constant evaluate: static const int arr[] = {1, 2, 3, 4, 5}; int test() { int sum = 0; for (int i = 0; i < 5; ++i) sum += arr[i]; return sum; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142731 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Fix a typo.wNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142729 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Minor updates.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142728 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Added my name to CREDITS.TXTNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142727 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Move various generated tables into read-only memory, fixing up const ↵Benjamin Kramer
correctness along the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22Fix pr11193.Nadav Rotem
SHL inserts zeros from the right, thus even when the original sign_extend_inreg value was of 1-bit, we need to sra. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-22The different flavors of ARM have different valid subsets of registers. CheckBill Wendling
that the set of callee-saved registers is correct for the specific platform. <rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 4-register sequential variant of VLD2.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142704 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Make sure that the landing pads themselves have no PHI instructions in them.Bill Wendling
The assumption in the back-end is that PHIs are not allowed at the start of the landing pad block for SjLj exceptions. <rdar://problem/10313708> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Extend the floating point heuristic to consider NaN checks unlikely.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142687 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Revert r141657 for now. This has broken css and changed links on llvm.org. ↵Tanya Lattner
I'd like to understand exactly why the links have changed and if a newer doxygen is required. This may be reapplied once we upgrade on llvm.org and it is fully tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142686 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Remap blockaddress correctly when inlining a function. Fixes PR10162.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142684 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Use LLVMBool for a function that logically returns a boolean value.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142683 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 4-register variant of VLD1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Fix typo.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142681 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21BranchProbabilityInfo: floating point equality is unlikely.Benjamin Kramer
This is from the same paper from Ball and Larus as the rest of the currently implemented heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142677 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Assembly parsing for 3-register variant of VLD1.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21STABS symbols are debug symbols.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Minor simplification: use ShuffleVectorInst::getMaskValue instead of a more ↵Eli Friedman
expensive helper. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142672 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Extend instcombine's shufflevector simplification to handle more cases where ↵Eli Friedman
the input and output vectors have different sizes. Patch by Xiaoyi Guo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142671 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21ARM VLD parsing and encoding.Jim Grosbach
Next step in the ongoing saga of NEON load/store assmebly parsing. Handle VLD1 instructions that take a two-register register list. Adjust the instruction definitions to only have the single encoded register as an operand. The super-register from the pseudo is kept as an implicit def, so passes which come after pseudo-expansion still know that the instruction defines the other subregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Don't automatically set the "fc" bits on MSR instructions if the user didn't ↵Owen Anderson
ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Bind libObject API for obtaining the section containing a Symbol.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Expand the coverage of the libObject C bindings to include more SectionRef ↵Owen Anderson
accessors as well as Symbol iterators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142661 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Fix pr11194. When promoting and splitting integers we need to useNadav Rotem
ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize. SetCC return type needs to be legalized via PromoteTargetBoolean. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Nuke an #if0 that got accidentally left in.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21whitespace.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Don't hard code the desired alignment for loops -- it isn't 16-bytes onChandler Carruth
all x86 systems. Sorry for the breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142656 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Remove some outdated comments.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-211. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC ↵Nadav Rotem
type. 2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Ensure timestamps are not embedded into files when doing a release build.Duncan Sands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Fix build on mingw-w64.Anton Korobeynikov
Patch by Ruben Van Boxem! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Add loop aligning to MachineBlockPlacement based on review discussion soChandler Carruth
it's a bit more plausible to use this instead of CodePlacementOpt. The code for this was shamelessly stolen from CodePlacementOpt, and then trimmed down a bit. There doesn't seem to be much utility in returning true/false from this pass as we may or may not have rewritten all of the blocks. Also, the statistic of counting how many loops were aligned doesn't seem terribly important so I removed it. If folks would like it to be included, I'm happy to add it back. This was probably the most egregious of the missing features, and now I'm going to start gathering some performance numbers and looking at specific loop structures that have different layout between the two. Test is updated to include both basic loop alignment and nested loop alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Add a very basic test for MachineBlockPlacement. This is essentially theChandler Carruth
canonical example I used when developing it, and is one of the primary motivating real-world use cases for __builtin_expect (when burried under a macro). I'm working on more test cases here, but I'm trying to make sure both that the pass is doing the right thing with the test cases and that they aren't too brittle to changes elsewhere in the code generation pipeline. Feedback and/or suggestions on how to test this are very welcome. Especially feedback on whether testing the block comments is a good strategy; I couldn't find any good examples to steal from but all the other ideas I had were a lot uglier or more fragile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Modify the script to output the regressions and passes into categories. My ↵Bill Wendling
Python-fu could use some improving... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142643 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ↵Craig Topper
custom isel lowering code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Implement a block placement pass based on the branch probability andChandler Carruth
block frequency analyses. This differs substantially from the existing block-placement pass in LLVM: 1) It operates on the Machine-IR in the CodeGen layer. This exposes much more (and more precise) information and opportunities. Also, the results are more stable due to fewer transforms ocurring after the pass runs. 2) It uses the generalized probability and frequency analyses. These can model static heuristics, code annotation derived heuristics as well as eventual profile loading. By basing the optimization on the analysis interface it can work from any (or a combination) of these inputs. 3) It uses a more aggressive algorithm, both building chains from tho bottom up to maximize benefit, and using an SCC-based walk to layout chains of blocks in a profitable ordering without O(N^2) iterations which the old pass involves. The pass is currently gated behind a flag, and not enabled by default because it still needs to grow some important features. Most notably, it needs to support loop aligning and careful layout of loop structures much as done by hand currently in CodePlacementOpt. Once it supports these, and has sufficient testing and quality tuning, it should replace both of these passes. Thanks to Nick Lewycky and Richard Smith for help authoring & debugging this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm forgetting for reviewing and answering all my questions. Writing a backend pass is *sooo* much better now than it used to be. =D git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Check for divide by zero.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142640 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Remove a now dead function, fixing -Wunused-function warnings fromChandler Carruth
Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142631 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21Fix unused variable warning.Richard Smith
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Revert r142618, r142622, and r142624, which were based on an incorrect ↵Owen Anderson
reading of the ARMv7 docs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Fix decoding tests for fixed MSR encodings.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Remove unused include of sys/uio.h in MemoryBuffer.cpp. It was not correctly ↵David Meyer
protected by ifdef either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Fix tests for corrected MSR encodings.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Disable the PPC hazard recognizer. It currently only supportsDan Gohman
top-down scheduling and top-down scheduling is going away. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142621 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-09-25 08:47:25 +0000