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2013-04-27Fix a XOR reassociation bug. Shuxin Yang
When Reassociator optimize "(x | C1)" ^ "(X & C2)", it may swap the two subexpressions, however, it forgot to swap cached constants (of C1 and C2) accordingly. rdar://13739160 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180676 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Documentation: end option description with a periodDmitri Gribenko
Patch by Dimitry Andric. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180675 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27AArch64: convert MC-layer test to .s fileTim Northover
The CodeGen aspects of this test are already covered by cfi-frame.ll; making it an assembly file reduces the risk of incidental changes affecting the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180671 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27[objc-arc] Test cleanups.Michael Gottesman
Mainly adding paranoid checks for the closing brace of a function to help with FileCheck error readability. Also some other minor changes. No actual CHECK changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180668 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Generalize the MachineTraceMetrics public API.Andrew Trick
Naturally, we should be able to pass in extra instructions, not just extra blocks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180667 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Add target flags to MachineMemOperands.Andrew Trick
This seems to me an obvious place to allow target passes to annotate memory operations. There are plenty of bits, and I'm not aware of another good way for early target passes to propagate hints along to later passes. Target independent transforms can simply preserve them, the way they preserve the other flags. Like MachineMemOperands in general, if the target flags are lost we must still generate correct code. This has lots of uses, but I want this flexibility now to make it easier to work with the new MachineTraceMetrics analysis. MachineTraceMetrics can gather a lot of information about instructions based on the surrounding code. This information can be used to influence postRA machine passes that don't work on SSA form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180666 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180665 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Use the target triple from the target machine rather than the moduleEric Christopher
to determine whether or not we're on a darwin platform for debug code emitting. Solves the problem of a module with no triple on the command line and no triple in the module using non-gdb ok features on darwin. Fix up the member-pointers test to check the correct things for cross platform (DW_FORM_flag is a good prefix). Unfortunately no testcase because I have no ideas how to test something without a triple and without a triple in the module yet check precisely on two platforms. Ideas welcome. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180660 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Move the XFAIL out of the middle of a comment.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180659 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Make all darwin ppc stubs local.Rafael Espindola
This fixes pr15763. Patch by David Fang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180657 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-27Struct-path aware TBAA: change the format of TBAAStructType node.Manman Ren
We switch the order of offset and field type to make TBAAStructType node (name, parent node, offset) similar to scalar TBAA node (name, parent node). TypeIsImmutable is added to TBAAStructTag node. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180654 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Cleanup and document MachineLocation.Adrian Prantl
Clarify documentation and API to make the difference between register and register-indirect addressed locations more explicit. Put in a comment to point out that with the current implementation we cannot specify a register-indirect location with offset 0 (a breg 0 in DWARF). No functionality change intended. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180641 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Micro-optimizationBill Wendling
TLVs probably won't be as common as the other types of variables. Check for them last before defaulting to "DATA". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180631 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Make CHECK lines a bit less strict so they also match code generated for win64.Benjamin Kramer
Hopefully brings the windows buildbots back to life. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Teach the interpreter to handle vector compares and additional vector ↵Nadav Rotem
arithmetic operations. Patch by Yuri Veselov. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180626 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Use llvm/Object/MachO.h in macho-dumper. Drop the old macho parser.Rafael Espindola
For Mach-O there were 2 implementations for parsing object files. A standalone llvm/Object/MachOObject.h and llvm/Object/MachO.h which implements the generic interface in llvm/Object/ObjectFile.h. This patch adds the missing features to MachO.h, moves macho-dump to use MachO.h and removes ObjectFile.h. In addition to making sure that check-all is clean, I checked that the new version produces exactly the same output in all Mach-O files in a llvm+clang build directory (including executables and shared libraries). To test the performance, I ran macho-dump over all the files in a llvm+clang build directory again, but this time redirecting the output to /dev/null. Both the old and new versions take about 4.6 seconds (2.5 user) to finish. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180624 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26The exception demo needs its symbols exported.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180622 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTETom Stellard
We need to intialize this to something and since clang does not set the shader type attribute and clang is used only for compute shaders, initializing it to COMPUTE seems like the best choice. Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180620 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26cleanup testcase some moreAdrian Prantl
rdar://problem/13056109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26fix a typo that due to cu&paste quadrupled itselfAdrian Prantl
rdar://problem/13056109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180618 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet
"hint" space for Thumb actually overlaps the encoding space of the CPS instruction. In actuality, hints can be defined as CPS instructions where imod and M bits are all nil. Handle decoding of permitted nop-compatible hints (i.e. nop, yield, wfi, wfe, sev) in DecodeT2CPSInstruction. This commit adds a proper diagnostic message for Imm0_4 and updates all tests. Patch by Mihail Popa <Mihail.Popa@arm.com>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180617 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Add missing ':'.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180616 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Bugfix for the debug intrinsic handling in InstCombiner:Adrian Prantl
Since we can't guarantee that the original dbg.declare instrinsic is removed by LowerDbgDeclare(), we need to make sure that we are not inserting the same dbg.value intrinsic over and over. This removes tons of redundant DIEs when compiling optimized code. rdar://problem/13056109 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180615 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26PowerPC: Use RegisterOperand instead of RegisterClass operandsUlrich Weigand
In the default PowerPC assembler syntax, registers are specified simply by number, so they cannot be distinguished from immediate values (without looking at the opcode). This means that the default operand matching logic for the asm parser does not work, and we need to specify custom matchers. Since those can only be specified with RegisterOperand classes and not directly on the RegisterClass, all instructions patterns used by the asm parser need to use a RegisterOperand (instead of a RegisterClass) for all their register operands. This patch adds one RegisterOperand for each RegisterClass, using the same name as the class, just in lower case, and updates all instruction patterns to use RegisterOperand instead of RegisterClass operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180611 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Re-write the address propagation code for pre-indexed loads/stores to take ↵Silviu Baranga
into account some previously misssed cases (PRE_DEC addressing mode, the offset and base address are swapped, etc). This should fix PR15581. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180609 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26PowerPC: Fix encoding of vsubcuw and vsum4sbs instructionsUlrich Weigand
When testing the asm parser, I noticed wrong encodings for the above instructions (wrong sub-opcodes). Tests will be added together with the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180608 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26PowerPC: Fix encoding of stfsu and stfdu instructionsUlrich Weigand
When testing the asm parser, I noticed wrong encodings for the above instructions (wrong sub-opcodes). Note that apparently the compiler currently never generates pre-inc instructions for floating point types for some reason ... Tests will be added together with the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180607 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26PowerPC: Fix encoding of rldimi and rldcl instructionsUlrich Weigand
When testing the asm parser, I noticed wrong encodings for the above instructions (wrong operand name in rldimi, wrong form and sub-opcode for rldcl). Tests will be added together with the asm parser. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180606 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26PowerPC: Support PC-relative fixup_ppc_brcond14.Ulrich Weigand
When testing the asm parser, I ran into an error when using a conditional branch to an external symbol (this doesn't occur in compiler-generated code) due to missing support in PPCELFObjectWriter::getRelocTypeInner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180605 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26ARM/NEON: Pattern match vector integer abs to vabs.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180604 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26X86: Now that we have a canonical form for vector integer abs, match it into ↵Benjamin Kramer
pabs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26DAGCombiner: Canonicalize vector integer abs in the same way we do it for ↵Benjamin Kramer
scalars. This already helps SSE2 x86 a lot because it lacks an efficient way to represent a vector select. The long term goal is to enable the backend to match a canonicalized pattern into a single instruction (e.g. vabs or pabs). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26LoopVectorizer: Calculate the number of pointers to disambiguate at runtime ↵Nadav Rotem
based on the numbers of reads and writes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180593 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Use 'git svn find-rev' in git-svnrevert instead of shell script fu.Michael Gottesman
Thanks Chandler! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180592 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Revert "[objc-arc] Added ImpreciseAutoreleaseSet to track autorelease calls ↵Michael Gottesman
that were once autoreleaseRV instructions." This reverts commit r180222. I think this might tie in with a different problem which will require a different approach potentially. I am reverting this in the case I need to go down that second path. My apologies for the noise. = /. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180590 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Updated GettingStarted.rst so that it references utils/git-svn for git-svnup ↵Michael Gottesman
instead of catting it into the documentation itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180589 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Added the scripts git-svnup/git-svnrevert to utils/git-svn.Michael Gottesman
It makes more sense to have git-svnup here than catting said file in the documentation (where we should rather point users to this directory). I included git-svnrevert as an additional gift to the community. I will update the documentation in a second commit later today. git-svnrevert takes in a git hash for a commit, looks up the svn revision for said commit and then creates the normal git revert commit message with the one liner message, except instead of saying Revert "<<<INSERT ONELINER HERE>>>" This reverts commit <<<INSERT GITHASH HERE>>> It says: Revert "<<<INSERT ONELINER HERE>>>" This reverts commit r<<<INSERT SVN REVISION HERE>>> so git hashes will not escape into our svn logs (which just look unseemly). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180587 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Mips assembler: .set reorder supportJack Carter
Mips have delayslots for certain instructions like jumps and branches. These are instructions that follow the branch or jump and are executed before the jump or branch is completed. Early Mips compilers could not cope with delayslots and left them up to the assembler. The assembler would fill the delayslots with the appropriate instruction, usually just a nop to allow correct runtime behavior. The default behavior for this is set with .set reorder. To tell the assembler that you don't want it to mess with the delayslot one used .set noreorder. For backwards compatibility we need to support .set reorder and have it be the default behavior in the assembler. Our support for it is to insert a NOP directly after an instruction with a delayslot when in .set reorder mode. Contributer: Vladimir Medic git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180584 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Remove SMLoc paired with CHECK-NOT patterns. Not functionality change.Michael Liao
Pattern has source location by itself. After adding a trivial method to retrieve it, it's unnecessary to pair a source location for CHECK-NOT patterns. One thing revised after this is the diagnostic info is more accurate by pointing to the start of the CHECK-NOT pattern instead of the end of the CHECK-NOT pattern. E.g. diagnostic message previously looks like <stdin>:1:1: error: CHECK-NOT: string occurred! test ^ test.txt:1:16: note: CHECK-NOT: pattern specified here CHECK-NOT: test ^ is changed to <stdin>:1:1: error: CHECK-NOT: string occurred! test ^ test.txt:1:12: note: CHECK-NOT: pattern specified here CHECK-NOT: test ^ git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180578 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Make function documentation conform to llvm standards.Preston Gurd
Expunge all remaining traces and use of live variable information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180577 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25ARM cost model: Integer div and rem is lowered to a function callArnold Schwaighofer
Reflect this in the cost model. I observed this in MiBench/consumer-lame. radar://13354716 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180576 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Re-enabling MCJIT object caching with memory leak fixedAndrew Kaylor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180575 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25revert r179735, it has no testcases, and doesn't really make sense.Chris Lattner
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180574 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25This patch adds the X86FixupLEAs pass, which will reduce instructionPreston Gurd
latency for certain models of the Intel Atom family, by converting instructions into their equivalent LEA instructions, when it is both useful and possible to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25LoopVectorizer: No need to generate pointer disambiguation checks between ↵Nadav Rotem
readonly pointers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180570 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25[mc-coff] Forward Linker Option flags into the .drectve sectionReid Kleckner
Summary: This is modelled on the Mach-O linker options implementation and should support a Clang implementation of #pragma comment(lib/linker). Reviewers: rafael CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D724 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180569 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Fix section relocation for SECTIONREL32 with immediate offset.Rafael Espindola
Patch by Kai Nacke. This matches the gnu as output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180568 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Remove tailing whitespacesMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180564 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25[inline asm] Add a test case for r180226. The specific issue is that the inlineChad Rosier
assembly is requesting a 64-bit register, which is invalid for i386. rdar://13731657 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25Use a pointer as the relocation iterator.Rafael Espindola
Since the relocation iterator walks only the relocations in one section, we can just use a pointer and avoid fetching information about the section at every reference. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180262 91177308-0d34-0410-b5e6-96231b3b80d8
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