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2011-10-04Replace snprintf with raw_string_ostream.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Tidy up formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Un-XFAIL file. Fix incorrect CHECK lines. General format cleanup.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Un-XFAIL file. Fix incorrect CHECK line. General format cleanup.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Tidy up formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Un-XFAIL file. Fix incorrect CHECK line.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Un-XFAIL the file. Disable only the individual tests that aren't working yet.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141108 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Add method to determine if a begin label has a call site number associated ↵Bill Wendling
with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141107 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Properly use const_iterator.Jakob Stoklund Olesen
This should unbreak the Windows build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141105 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Update cmake list.Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141104 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Tell people using the tutorial how to make it actually work.David Chisnall
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141103 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Test Operand ArgumentsDavid Greene
Add a test to do list manipulation and pass the result as arguments. This tests the new list element operator resolve code and provides an example of using list manipulation to do instruction pattern substitution. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141102 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Allow Operator ArgumentsDavid Greene
When resolving an operator list element reference, resolve all operator operands and try to fold the operator first. This allows the operator to collapse to a list which may then be indexed. Before, it was not possible to do this: class D<int a, int b> { ... } class C<list<int> A> : D<A[0], A[1]>; class B<list<int> b> : C<!foreach(...,b)>; Now it is. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Un-XFAIL the file. Disable only the individual tests that aren't working yet.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Unbreak CMake build.Ted Kremenek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141097 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Tidy up. Formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141096 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Put GCOVFile and other related interface in a common header so that llvm-cov ↵Devang Patel
tool can share it with GCOV writer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Unbreak MSVC build.Francois Pichet
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Fix PR9833/PR11054 (patch provided by Patrik Hägglund)David Dean
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141092 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Teach TableGen to infer missing register classes.Jakob Stoklund Olesen
The set of register classes should be closed under sub-register operations and intersections. That will allow the register allocator to model combinations of constraints accurately. This patch implements the easiest form of register class inference: For every register class, and for every sub-register SubIdx, the subset of registers in RC that have a SubIdx sub-register should also be a register class. This does create some new register classes for the targets in the tree: ARM gets a new QQQQPR_with_ssub_0. This class was omitted from the .td file on purpose because it only has two registers. InstrEmitter and RegisterCoalescer have safeguards against selecting too small register classes, so it is harmless. PowerPC gets a G8RC_with_sub_32 class because LR is not a sub_32 sub-register of LR8. I think that might be an omission? X86 puts RIP in the GR64 class, and since that register doesn't have 8-bit sub-registers, we get: GR64_with_sub_8bit GR64_TC_with_sub_8bit GR64_NOREX_with_sub_8bit GR64_TC_with_sub_8bit_hi The various CodeGen classes have already been fixed so adding new register classes should not affect compile time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Teach PPCInstrInfo to handle sub-classes.Jakob Stoklund Olesen
This has already been done for most other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04TableGen: Store all allocation orders together.Jakob Stoklund Olesen
There is no need to keep the primary order separate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141082 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04TableGen: Privatize CodeGenRegisterClass::TheDef and Name.Jakob Stoklund Olesen
When TableGen starts creating its own register classes, the synthesized classes won't have a Record reference. All register classes must have a name, though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141081 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04TableGen: Don't add synthetic Records to the RecordKeeper.Jakob Stoklund Olesen
The RecordKeeper could be shared by multiple target instances, causing duplicate record errors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04tblgen: add preprocessor as a separate modeChe-Liang Chiou
This patch adds a preprocessor that can expand nested for-loops for saving some copy-n-paste in *.td files. The preprocessor is not yet integrated with TGParser, and so it has no direct effect on *.td inputs. However, you may preprocess an td input (and only preprocess it). To test the proprecessor, type: tblgen -E -o $@ $< git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Set operation actions to legal types only.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141075 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Operations should be custom lowered only if their type is legal.Nadav Rotem
Test: CellSPU/v2i32.ll when running with -promote-elements git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141074 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04The product of two chrec's can always be represented as a chrec.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Add support in the disassembler for ignoring the L-bit on certain VEX ↵Craig Topper
instructions. Mark instructions that have this behavior. Fixes PR10676. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04LSR should avoid redundant edge splitting.Andrew Trick
This handles the case in which LSR rewrites an IV user that is a phi and splits critical edges originating from a switch. Fixes <rdar://problem/6453893> LSR is not splitting edges "nicely" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04whitespaceAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141058 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Remove last references to hotpatch.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Exclude libLLVMTableGen.a from the shared libraryPeter Collingbourne
Unbreaks tools for --enable-shared build. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141052 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Generic cleanup.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141050 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-04Unit test for r140919, loop unroll heuristics.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Tidy up. These tests are covered in the .s file tests now.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03ARM assembly parsing and encoding for VMOV immediate.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141046 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Tidy up. 80 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141043 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Use the PC label ID rather than '1'. Add support for thumb-2, because I ↵Bill Wendling
heard that some people use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141042 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Don't carry over the dispatchsetup hack from the old system.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03ARM parsing/encoding for VCMP/VCMPE.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141038 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Fix typo in comments.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141032 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Check-pointing the new SjLj EH lowering.Bill Wendling
This code will replace the version in ARMAsmPrinter.cpp. It creates a new machine basic block, which is the dispatch for the return from a longjmp call. It then shoves the address of that machine basic block into the correct place in the function context so that the EH runtime will jump to it directly instead of having to go through a compare-and-jump-to-the-dispatch bit. This should be more efficient in the common case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Move CHECK after entry label.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Add support for 64-bit logical NOR.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141029 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Add support for 64-bit count leading ones and zeros instructions.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Move the grabbing of the jump buffer into the caller function, eliminating ↵Bill Wendling
the need for returning a std::pair. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03ARM assembly parsing and encoding for VMRS/FMSTAT.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141025 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Add support for 64-bit divide instructions.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-03Add C api for Instruction->eraseFromParent().Devang Patel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141023 91177308-0d34-0410-b5e6-96231b3b80d8
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