Age | Commit message (Collapse) | Author |
|
This comment has the dual effect of blocking reorderings with the
sort_include script.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169221 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
The count field is necessary because there isn't a difference between the 'lo'
and 'hi' attributes for a one-element array and a zero-element array. When the
count is '0', we know that this is a zero-element array. When it's >=1, then
it's a normal constant sized array. When it's -1, then the array is unbounded.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169218 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Added the code that actually performs the if-conversion during vectorization.
We can now vectorize this code:
for (int i=0; i<n; ++i) {
unsigned k = 0;
if (a[i] > b[i]) <------ IF inside the loop.
k = k * 5 + 3;
a[i] = k; <---- K is a phi node that becomes vector-select.
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169217 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
does not change the current behavior)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169216 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169215 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169214 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169213 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169212 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169211 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Apparently Dinkumware are no longer hosting their nice reference
manuals. Thankfully, `cppreference.com` can fill that role well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169210 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
The type of shirt-right (logical or arithemetic) should remain unchanged
when transforming "X << C1 >> C2" into "X << (C1-C2)"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169209 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Patch by Alexander Zinenko!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169208 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
emit calls into runtime library that poison memory for local variables when their lifetime is over and unpoison memory when their lifetime begins.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169200 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169198 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
the alignment is clamped to TargetFrameLowering.getStackAlignment if the target
does not support stack realignment or the option "realign-stack" is off.
This will cause miscompile if the address is treated as aligned and add is
replaced with or in DAGCombine.
Added a bool StackRealignable to TargetFrameLowering to check whether stack
realignment is implemented for the target. Also added a bool RealignOption
to MachineFrameInfo to check whether the option "realign-stack" is on.
rdar://12713765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169197 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169196 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169195 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169194 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
These functions have been replaced by TRI::getRegAllocationHints() which
provides the same capabilities.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169192 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Now that there can be multiple hint registers from targets, it doesn't
make sense to have a function that returns 'the' preferred register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169190 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Targets can provide multiple hints now, so getRegAllocPref() doesn't
make sense any longer because it only returns one preferred register.
Replace it with getSimpleHint() in the remaining heuristics. This
function only
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169188 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
No functional change for this commit. The follow-up patch will add more stuff to
these functions.
rdar://12713765
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169186 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169183 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
This change tries to simmplify E1 = " X >> C1 << C2" into :
- E2 = "X << (C2 - C1)" if C2 > C1, or
- E2 = "X >> (C1 - C2)" if C1 > C2, or
- E2 = X if C1 == C2.
Reviewed by Nadav. Thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169182 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
Virtual registers with a known preferred register are prioritized by
RAGreedy. This function makes the condition explicit without depending
on getRegAllocPref().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169179 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
This small change adds support for that. It will make all MCJIT tests pass
in make-check on BigEndian platforms.
Patch by Petar Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169178 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
This change adds endian-awareness to MipsJITInfo and emitWordLE in
MipsCodeEmitter has become emitWord now to support both endianness.
Patch by Petar Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169177 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169176 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169175 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
code. Removing it.
Patch by Petar Jovanovic.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169174 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
This simplifies the hinting code quite a bit while making the targets
easier to write at the same time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169173 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169172 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169171 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
This provides the same functionality as getRawAllocationOrder() for the
even/odd hints, but without the many constant register arrays.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169169 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
using multiclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169168 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169167 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169166 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
"Windows.h" includes <Windows.h> which defines a bunch of stuff it shouldn't
(even with all the restriction macros). We have no control over this file, so
make it's scope as small as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169165 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
unreachable code in MachineModuleInfo
reviewed by Evan Cheng <evan.cheng@apple.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169164 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169163 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
"single basic block loop vectorizer" to "innermost loop vectorizer".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169158 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
space. SmallVector is still needed due to existing APIs growing their arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169157 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
The TargetRegisterInfo::getRegAllocationHints() function is going to
replace the existing mechanisms for providing target-dependent hints to
the register allocator: ResolveRegAllocHint() and
getRawAllocationOrder().
The new hook is more flexible because it allows the target to provide
multiple preferred candidate registers for each virtual register, and it
is easier to use because targets are not required to return a reference
to a constant array like getRawAllocationOrder().
An optional VirtRegMap argument can be used to provide target-dependent
hints that depend on the provisional assignments of other virtual
registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169154 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
using multiclass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169153 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
which is the legality of the if-conversion transformation. The next step is to
implement the cost-model for the if-converted code as well as the
vectorization itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169152 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169149 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
HexagonOperards.td.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169148 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
For comparison, with this code sample:
PointerUnion<int *, char *> Data;
PointerUnion<int *, char *> foo1() {
Data = new int;
return new int;
}
PointerUnion<int *, char *> foo2() {
Data = new char;
return new char;
}
Before this patch we would get:
define i64 @_Z4foo1v() uwtable ssp {
%1 = tail call noalias i8* @_Znwm(i64 4)
%2 = ptrtoint i8* %1 to i64
%3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%4 = and i64 %3, 1
%.masked.i = and i64 %2, -3
%5 = or i64 %4, %.masked.i
store i64 %5, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%6 = tail call noalias i8* @_Znwm(i64 4)
%7 = ptrtoint i8* %6 to i64
%8 = and i64 %7, -3
ret i64 %8
}
define i64 @_Z4foo2v() uwtable ssp {
%1 = tail call noalias i8* @_Znwm(i64 1)
%2 = ptrtoint i8* %1 to i64
%3 = load i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%4 = and i64 %3, 1
%5 = or i64 %2, %4
%6 = or i64 %5, 2
store i64 %6, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%7 = tail call noalias i8* @_Znwm(i64 1)
%8 = ptrtoint i8* %7 to i64
%9 = or i64 %8, 2
ret i64 %9
}
After the patch:
define i64 @_Z4foo1v() uwtable ssp {
%1 = tail call noalias i8* @_Znwm(i64 4)
%2 = ptrtoint i8* %1 to i64
store i64 %2, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%3 = tail call noalias i8* @_Znwm(i64 4)
%4 = ptrtoint i8* %3 to i64
ret i64 %4
}
declare noalias i8* @_Znwm(i64)
define i64 @_Z4foo2v() uwtable ssp {
%1 = tail call noalias i8* @_Znwm(i64 1)
%2 = ptrtoint i8* %1 to i64
%3 = or i64 %2, 2
store i64 %3, i64* getelementptr inbounds (%"class.llvm::PointerUnion"* @Data, i64 0, i32 0, i32 0), align 8
%4 = tail call noalias i8* @_Znwm(i64 1)
%5 = ptrtoint i8* %4 to i64
%6 = or i64 %5, 2
ret i64 %6
}
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169147 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
is not yet good enough for more sophistication. The important goal of this
test is to make sure llc doesn't crash on this IR like it used to.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169146 91177308-0d34-0410-b5e6-96231b3b80d8
|
|
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169145 91177308-0d34-0410-b5e6-96231b3b80d8
|