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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135186 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135185 91177308-0d34-0410-b5e6-96231b3b80d8
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registeration and creation code into XXXMCDesc libraries.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135184 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135183 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135182 91177308-0d34-0410-b5e6-96231b3b80d8
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when determining validity of matching constraint. Allow i1
types access to the GR8 reg class for x86.
Fixes PR10352 and rdar://9777108
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135180 91177308-0d34-0410-b5e6-96231b3b80d8
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Consolidate the individual declarations together for ease of reference. This
mirrors the organization in X86, as well, so is good for consistency. No
functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135179 91177308-0d34-0410-b5e6-96231b3b80d8
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of named struct types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135178 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135174 91177308-0d34-0410-b5e6-96231b3b80d8
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of calling getAllMetadata(). This is semantically identical, but doing
it this way avoids unpacking the DebugLoc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135173 91177308-0d34-0410-b5e6-96231b3b80d8
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an MDNode. This saves a bunch of time and memory in the IR linker, e.g. when
doing LTO of files with debug info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135172 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135171 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135169 91177308-0d34-0410-b5e6-96231b3b80d8
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ldm/stm are the cannonical spellings for ldmia/stmia, so use them as such.
Update the parsing/encoding tests accordingly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135168 91177308-0d34-0410-b5e6-96231b3b80d8
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const char* doesn't make sense. Have it return StringRef instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135167 91177308-0d34-0410-b5e6-96231b3b80d8
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conceptually have nuls in it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135165 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135164 91177308-0d34-0410-b5e6-96231b3b80d8
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non-virtual function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135163 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135158 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135157 91177308-0d34-0410-b5e6-96231b3b80d8
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The ISB instruction takes an optional operand, just like DMB/DSB. Typically
only 'sy' is meaningful.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135156 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135154 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135151 91177308-0d34-0410-b5e6-96231b3b80d8
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instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135146 91177308-0d34-0410-b5e6-96231b3b80d8
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reference the array passed to them instead of copying it to a std::vector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135145 91177308-0d34-0410-b5e6-96231b3b80d8
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During type legalization we often use the SIGN_EXTEND_INREG SDNode.
When this SDNode is legalized during the LegalizeVector phase, it is
scalarized because non-simple types are automatically marked to be expanded.
In this patch we add support for lowering SIGN_EXTEND_INREG manually.
This fixes CodeGen/X86/vec_sext.ll when running with the '-promote-elements'
flag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135144 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135143 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135142 91177308-0d34-0410-b5e6-96231b3b80d8
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Part of rdar://9761830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135133 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135132 91177308-0d34-0410-b5e6-96231b3b80d8
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TargetAsmInfo, which in turn pulls in TargetRegisterInfo, etc. :-( There are
other cases of violations, but this is probably the worst.
This patch is but one small step towards fixing this. 500 more steps to go. :-(
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135131 91177308-0d34-0410-b5e6-96231b3b80d8
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Original commit message:
Count references to interference cache entries.
Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.
This makes it possible to have multiple live cursors examining
interference for different physregs.
The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().
Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135130 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135127 91177308-0d34-0410-b5e6-96231b3b80d8
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simple SETNE is sufficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135126 91177308-0d34-0410-b5e6-96231b3b80d8
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much as possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135124 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixes rdar://9761830
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135123 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135122 91177308-0d34-0410-b5e6-96231b3b80d8
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Each InterferenceCache::Cursor instance references a cache entry. A
non-zero reference count guarantees that the entry won't be reused for a
new register.
This makes it possible to have multiple live cursors examining
interference for different physregs.
The total number of live cursors into a cache must be kept below
InterferenceCache::getMaxCursors().
Code generation should be unaffected by this change, and it doesn't seem
to affect the cache replacement strategy either.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135121 91177308-0d34-0410-b5e6-96231b3b80d8
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32-bit, it doesn't matter whether the operation overflows because the computed address is not wider than the immediate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135120 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135119 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135118 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135117 91177308-0d34-0410-b5e6-96231b3b80d8
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Add instalias for default 'sy' option. Add tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135116 91177308-0d34-0410-b5e6-96231b3b80d8
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The cache entry referenced by the best split candidate could become
clobbered by an unsuccessful candidate.
The correct fix here is to use reference counts on the cache entries.
Coming up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135113 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135112 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135111 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135110 91177308-0d34-0410-b5e6-96231b3b80d8
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Flesh out the options supported for the instruction. Shuffle tests a bit and
add entries for the rest of the options. Add an alias to handle the default
operand of "sy".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135109 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135107 91177308-0d34-0410-b5e6-96231b3b80d8
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an opcode. Switch ARM over to using that rather than its own special MCInstrDesc bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135106 91177308-0d34-0410-b5e6-96231b3b80d8
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