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2013-02-12Remove target-specific info from the testcase for DWARF/pubnames.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174992 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Check that pointers are removed from maps before calling delete on the pointers,Dan Gohman
for tidiness' sake. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174988 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Minor code simplification.Dan Gohman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174985 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[ms-inline asm] Add support for lexing binary integers with a [bB] suffix.Chad Rosier
This is complicated by backward labels (e.g., 0b can be both a backward label and a binary zero). The current implementation assumes [0-9]b is always a label and thus it's possible for 0b and 1b to not be interpreted correctly for ms-style inline assembly. However, this is relatively simple to fix in the inline assembly (i.e., drop the [bB]). This patch also limits backward labels to [0-9]b, so that only 0b and 1b are ambiguous. Part of rdar://12470373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174983 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Documentation: HowToUseAttributes: formatting (use monospaced font)Dmitri Gribenko
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174982 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Allow optionally generating pubnames section in DWARF info. IntroduceKrzysztof Parzyszek
option "generate-dwarf-pubnames" to control it, set to "false" by default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174981 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12added test cases for r174920 (prefetch disassembly)Kay Tiong Khoo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174979 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Equal treatment of labels and other terminators in MI DAG construction.Sergei Larin
MI sched DAG construction allows targets to include terminators into scheduling DAG. Extend this functionality to labels as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174977 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add support for the pubnames section to llvm-dwarfdump.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174976 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Fix the lit test added in r174972Paul Redmond
Patch by: Kevin Schoedel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174974 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Hexagon: Add support to generate predicated absolute addressing modeJyotsna Verma
instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174973 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12PR14562 - Truncation of left shift became undefPaul Redmond
DAGCombiner::ReduceLoadWidth was converting (trunc i32 (shl i64 v, 32)) into (shl i32 v, 32) into undef. To prevent this, check the shift count against the final result size. Patch by: Kevin Schoedel Reviewed by: Nadav Rotem git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174972 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[NVPTX] Disable vector registersJustin Holewinski
Vectors were being manually scalarized by the backend. Instead, let the target-independent code do all of the work. The manual scalarization was from a time before good target-independent support for scalarization in LLVM. However, this forces us to specially-handle vector loads and stores, which we can turn into PTX instructions that produce/consume multiple operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174968 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[ASan] Do not use kDefaultShort64bitShadowOffset on Mac, where the binaries ↵Alexander Potapenko
may get mapped at 0x100000000+ and thus may interleave with the shadow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174964 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12R600: Fix regression with shadow array sampler on pre-SI GPUs.Michel Danzer
'R600/SI: Use proper instructions for array/shadow samplers.' removed two cases from TEX_SHADOW. Vincent Lejeune reported on IRC that this broke some shadow array piglit tests with the r600g driver. Reinstating the removed cases should fix this, and still works with radeonsi as well. I will follow up with some lit tests which would have caught the regression. NOTE: This is a candidate for the Mesa stable branch. Tested-by: Vincent Lejeune <vljn@ovi.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174963 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Adding a HowTo for Attributes.Joe Abbey
This is based on Bill Wendling's email. No additional content has been added, but now there's a place for Attributes to capture future information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174961 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[asan] fix tests for the new ABIKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174959 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[asan] change the default mapping offset on x86_64 to 0x7fff8000. This gives ↵Kostya Serebryany
roughly 5% speedup. Since this is an ABI change, bump the asan ABI version by renaming __asan_init to __asan_init_v1. llvm part, compiler-rt part will follow git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174957 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Merge the collected attributes into the call instruction's attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174955 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Test for string attributes and for attribute group output.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Have the bitcode writer and reader handle the new attribute references.Bill Wendling
The bitcode writer emits a reference to the attribute group that the object at the given index refers to. The bitcode reader is modified to read this in and map it back to the attribute group. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174952 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Use the AttributeSet as the 'key' to the map instead of the 'raw' pointer.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174950 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Support string attributes in the AttrBuilder.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174948 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Don't consider definitions by other PHIs live-in when trimming a PHI source'sCameron Zwarich
live range after inserting a copy at the end of a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174945 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Fix indentation.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174944 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add a hidden option to PHIElimination to split all critical edges. This isCameron Zwarich
particularly useful for catching issues with architectures that have exotic terminators like MIPS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174938 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Renumber SlotIndexes locally when a new block is inserted.Cameron Zwarich
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Add blocks to the LiveIntervalAnalysis RegMaskBlocks array when splittingCameron Zwarich
a critical edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174936 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Fix the updating of LiveIntervals after splitting a critical edge. PHI operandCameron Zwarich
live ranges should always be extended, and the only successor that should be considered for extension of other ranges is the target of the split edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Check type for legality before forming a select from loads.Pete Cooper
Sorry for the lack of a test case. I tried writing one for i386 as i know selects are illegal on this target, but they are actually considered legal by isel and expanded later. I can't see any targets to trigger this, but checking for the legality of a node before forming it is general goodness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174934 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12ARM cost model: Add vector reverse shuffle costsArnold Schwaighofer
A reverse shuffle is lowered to a vrev and possibly a vext instruction (quad word). radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174933 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Cost model: Add check for reverse shuffles to CostModel analysisArnold Schwaighofer
Check for reverse shuffles in the CostModel analysis pass and query TargetTransform info accordingly. This allows us we can write test cases for reverse shuffles. radar://13171406 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174932 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12ARM NEON: Handle v16i8 and v8i16 reverse shufflesArnold Schwaighofer
Lower reverse shuffles to a vrev64 and a vext instruction instead of the default legalization of storing and loading to the stack. This is important because we generate reverse shuffles in the loop vectorizer when we reverse store to an array. uint8_t Arr[N]; for (i = 0; i < N; ++i) Arr[N - i - 1] = ... radar://13171760 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174929 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Update error message due to previous commit, r174926.Chad Rosier
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174927 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12[ms-inline asm] Add support for lexing hexidecimal integers with a [hH] suffix.Chad Rosier
Part of rdar://12470373 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174926 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12DIBuilder: make the return type of createBasicType more specificDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-12Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo
Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174920 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Don't over-search when building the dependency mapHal Finkel
When building the pairable-instruction dependency map, don't search past the last pairable instruction. For large blocks that have been divided into multiple instruction groups, searching past the last instruction in each group is very wasteful. This gives a 32% speedup on the csa.ll test case from PR15222 (when using 50 instructions in each group). No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174915 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11BBVectorize: Omit unnecessary entries in PairableInstUsersHal Finkel
This map is queried only for instructions in pairs of pairable instructions; so make sure that only pairs of pairable instructions are added to the map. This gives a 3.5% speedup on the csa.ll test case from PR15222. No functionality change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174914 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[Support][Compiler] Add LLVM_HAS_VARIADIC_TEMPLATES.Michael J. Spencer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174913 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[mips] Expand pseudo instructions before they are emitted inAkira Hatanaka
MipsCodeEmitter.cpp. JALR and NOP are expanded by function emitPseudoExpansionLowering, which is not called when the old JIT is used. This fixes the following tests which have been failing on llvm-mips-linux builder: LLVM :: ExecutionEngine__2003-01-04-LoopTest.ll LLVM :: ExecutionEngine__2003-05-06-LivenessClobber.ll LLVM :: ExecutionEngine__2003-06-04-bzip2-bug.ll LLVM :: ExecutionEngine__2005-12-02-TailCallBug.ll LLVM :: ExecutionEngine__2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll LLVM :: ExecutionEngine__hello2.ll LLVM :: ExecutionEngine__stubs.ll LLVM :: ExecutionEngine__test-branch.ll LLVM :: ExecutionEngine__test-call.ll LLVM :: ExecutionEngine__test-common-symbols.ll LLVM :: ExecutionEngine__test-loadstore.ll LLVM :: ExecutionEngine__test-loop.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174912 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Rename AttributeSets to AttributeGroups so that it's more meaningful.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174911 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Use a std::map so that we record the group ID.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Rename to something more sensible. No functionality change.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174909 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11[mips] Fix indentation.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174907 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Optimization: bitcast (<1 x ...> insertelement ..., X, ...) to ... ==> ↵Michael Ilseman
bitcast X to ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174905 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Extend Hexagon hardware loop generation to handle various additional cases:Krzysztof Parzyszek
- variety of compare instructions, - loops with no preheader, - arbitrary lower and upper bounds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174904 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Remove trailing whitespaceMichael Ilseman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174903 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11Implement HexagonInstrInfo::analyzeCompare.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174901 91177308-0d34-0410-b5e6-96231b3b80d8
2013-02-11*fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo
*added file for test cases for i386 intel syntax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174900 91177308-0d34-0410-b5e6-96231b3b80d8
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