aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2013-03-28Non optimizable objc_retainBlock calls are not forwarding.Michael Gottesman
Since we handle optimizable objc_retainBlocks through strength reduction in OptimizableIndividualCalls, we know that all code after that point will only see non-optimizable objc_retainBlock calls. IsForwarding is only called by functions after that point, so it is ok to just classify objc_retainBlock as non-forwarding. <rdar://problem/13249661>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178285 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28[ObjCARC] Strength reduce objc_retainBlock -> objc_retain if the ↵Michael Gottesman
objc_retainBlock is optimizable. If an objc_retainBlock has the copy_on_escape metadata attached to it AND if the block pointer argument only escapes down the stack, we are allowed to strength reduce the objc_retainBlock to to an objc_retain and thus optimize it. Current there is logic in the ARC data flow analysis to handle this case which is complicated and involved making distinctions in between objc_retainBlock and objc_retain in certain places and considering them the same in others. This patch simplifies said code by: 1. Performing the strength reduction in the initial ARC peephole analysis (ObjCARCOpts::OptimizeIndividualCalls). 2. Changes the ARC dataflow analysis (which runs after the peephole analysis) to consider all objc_retainBlock calls to not be optimizable (since if the call was optimizable, we would have strength reduced it already). This patch leaves in the infrastructure in the ARC dataflow analysis to handle this case, which due to 2 will just be dead code. I am doing this on purpose to separate the removal of the old code from the testing of the new code. <rdar://problem/13249661>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178284 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Hexagon: Replace switch-case in isDotNewInst with TSFlags.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178281 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Fix bad indentation in r178276Hal Finkel
Thanks to Bill Schmidt for pointing this out! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178280 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178279 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Remove -O3.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178278 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Use direct types in most PowerPC Altivec instructions and patterns.Bill Schmidt
This follows up Ulrich Weigand's work in PPCInstrInfo.td and PPCInstr64Bit.td by doing the corresponding work for most of the Altivec patterns. I have not been able to do anything for the following classes of instructions: (1) Vector logicals. These don't have corresponding intrinsics and don't have a single obvious vector type. So far as I can tell I need to leave these as VRRC. Affected instructions are: VAND, VANDC, VNOR, VOR, VXOR, V_SET0. (2) Instructions that make use of vector shuffle. The selection code promotes all shuffles to v16i8, so any pattern that matches on a shuffle is constrained. I haven't found any way to make the patterns match on their natural types, so I plan to leave these as VRRC. Affected instructions are: VMRG*, VSPLTB, VSPLTH, VSPLTW, VPKUHUM, VPKUWUM. No change in behavior is anticipated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178277 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Add the PPC64 ldbrx/stdbrx instructionsHal Finkel
These are 64-bit load/store with byte-swap, and available on the P7 and the A2. Like the similar instructions for 16- and 32-bit words, these are matched in the target DAG-combine phase against load/store-bswap pairs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178276 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when ↵Gordon Keiser
the upper bit is set. They should always be zero-extended, not sign extended. Added test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178275 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Testing commit access to llvm. Remove two lines of whitespace from the ↵Gordon Keiser
Thumb README. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178256 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Correct spelling of Git.Thomas Schwinge
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Move test since it depends on the X86 backend.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Hexagon: Use multiclass for gp-relative instructions.Jyotsna Verma
Remove noV4T gp-relative instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178246 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Seciton 24.2.2 of the C++ standard, [iterator.iterators], Table 106Howard Hinnant
requires that the return type of *r for all iterators r be reference, where reference is defined in [iterator.requirements.general]/p11 as iterator_traits<X>::reference, and X is the type of r. But in CFG.h, the dereference operator of PredIterator and SuccIterator return pointer, not reference. Furthermore the nested type reference is value_type&, which is not the type returned from operator*(). This patch simply makes the iterator::reference type value_type*, which is what the operator*() returns, and then re-lables the return type as reference. From a functionality point of view, the only difference is that the nested reference type is now value_type* instead of value_type&. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178240 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28AArch64: implement GICv3 system registersTim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178236 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Add the PPC64 popcntd instructionHal Finkel
PPC ISA 2.06 (P7, A2, etc.) has a popcntd instruction. Add this instruction and tell TTI about it so that popcount-loop recognition will know about it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28[tsan] make sure memset/memcpy/memmove are not inlined in tsan modeKostya Serebryany
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178230 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Revert "Updated ELF relocation test for .eh_frame section"Michael Gottesman
This reverts commit c8d65364223a04b179958a50a4bf0f89b21dd7d2. This broke a bunch of the buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Disable JIT/MCJIT tests in unittests/ExecutionEngine for the targets that ↵Jyotsna Verma
don't support JIT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178221 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Cleanup PPC CR-spill kill flags and 32- vs. 64-bit instructionsHal Finkel
There were a few places where kill flags were not being set correctly, and where 32-bit instruction variants were being used with 64-bit registers. After r178180, this code was being triggered causing llc to assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Fix typo in PPCInstr64BitHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Revert "Adding DIImportedModules to DIScopes."David Blaikie
This reverts commit 342d92c7a0adeabc9ab00f3f0d88d739fe7da4c7. Turns out we're going with a different schema design to represent DW_TAG_imported_modules so we won't need this extra field. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-28Check if Type is a vector before calling function Type::getVectorNumElements.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27This patch follows is a follow up to r178171, which uses the register Preston Gurd
form of call in preference to memory indirect on Atom. In this case, the patch applies the optimization to the code for reloading spilled registers. The patch also includes changes to sibcall.ll and movgs.ll, which were failing on the Atom buildbot after the first patch was applied. This patch by Sriram Murali. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178193 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Updated ELF relocation test for .eh_frame sectionJack Carter
Made sure we were looking a correct section Added Mips32/64 as an extra check Updated llvm-objdump to generate symbolic info for Mips relocations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178190 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27[ms-inline asm] Add support of imm displacement before bracketed memoryChad Rosier
expression. Specifically, this syntax: ImmDisp [ BaseReg + Scale*IndexReg + Disp ] We don't currently support: ImmDisp [ Symbol ] rdar://13518671 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Resynchronize isLoadFromStackSlot with LoadRegFromStackSlot (and stores) in ↵Hal Finkel
PPCInstrInfo These functions should have the same list of load/store instructions. Now that all load/store forms have been normalized (to single instructions or pseudos) they can be resynchronized. Found by inspection, although hopefully this will improve optimization. I've also added some comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27test file name change to correct typoJack Carter
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178174 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27For the current Atom processor, the fastest way to handle a callPreston Gurd
indirect through a memory address is to load the memory address into a register and then call indirect through the register. This patch implements this improvement by modifying SelectionDAG to force a function address which is a memory reference to be loaded into a virtual register. Patch by Sriram Murali. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178171 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Fix typo (common to both X86 and PPC)Hal Finkel
Thanks to Bill Schmidt for pointing this out during code review! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178170 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Remove more dead LR-as-GPR PPC codeHal Finkel
I had removed similar code a few days ago, but somehow missed this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178169 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Avoid undefined behavior from passing a std::vector's own contentsDan Gohman
in as an argument to push_back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178166 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Remove "gpr0 allocation" from the PPC README TODO listHal Finkel
As Chris pointed out, post r178123, this is now done! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178165 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Don't try to generate crash diagnostics if we had an I/O failure. It's veryChad Rosier
likely the crash diagnostics generation will fail as well. Part of rdar://13296693 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178163 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Add a boolean parameter to the llvm::report_fatal_error() function to indicatedChad Rosier
if crash diagnostics should be generated. By default this is enabled. Part of rdar://13296693 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178161 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Specutively revert r178130.Bill Wendling
This may be causing a failure on some buildbots: Referencing function in another module! tail call fastcc void @_ZL11EvaluateOpstPtRj(i16 zeroext %17, i16* %Vals, i32* %NumVals), !dbg !219 Referencing function in another module! tail call fastcc void @_ZL11EvaluateOpstPtRj(i16 zeroext %19, i16* %Vals, i32* %NumVals), !dbg !221 Broken module found, compilation aborted! Stack dump: 0. Running pass 'Function Pass Manager' on module 'ld-temp.o'. 1. Running pass 'Module Verifier' on function '@_ZL11EvaluateOpstPtRj' clang: error: unable to execute command: Illegal instruction: 4 clang: error: linker command failed due to signal (use -v to see invocation) <rdar://problem/13516485> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178156 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Fix commentDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178155 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Cleanup the simplify_type implementation.Rafael Espindola
As far as simplify_type is concerned, there are 3 kinds of smart pointers: * const correct: A 'const MyPtr<int> &' produces a 'const int*'. A 'MyPtr<int> &' produces a 'int *'. * always const: Even a 'MyPtr<int> &' produces a 'const int*'. * no const: Even a 'const MyPtr<int> &' produces a 'int*'. This patch then does the following: * Removes the unused specializations. Since they are unused, it is hard to know which kind should be implemented. * Make sure we don't drop const. * Fix the default forwarding so that const correct pointer only need one specialization. * Simplifies the existing specializations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178147 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27R600/SI: add SETO/SETUO patternsChristian Konig
6 more piglit tests. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Silence warning about mixing || in &&, fix up 80-cols.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178144 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Print PPC ZERO as 0 (not r0) even on DarwinHal Finkel
It seems that the Darwin PPC assembler requires r0 to be written as 0 when it means 0 (at least in lwarx/stwcx.). Fixes PR15605. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178142 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Switch to LLVM support function abs64 to keep VS2008 happy.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178141 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Disable ASan/MSan symbolization of reports in tests.Evgeniy Stepanov
It was using an instrumented symbolizer binary, which is a potential fork bomb. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178139 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Fix target-customized spilling in the register scavengerHal Finkel
This is a follow-up to r178073 (which should actually make target-customized spilling work again). I still don't have a regression test for this (but it would be good to have one; Thumb 1 and Mips16 use this callback as well). Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178137 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Disable Initialize.MultipleThreads test under MemorySanitizer.Evgeniy Stepanov
Fails due to insufficient thread stack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178135 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Enabling the generation of dependency breakers for partial updates on ↵Silviu Baranga
Cortex-A15. Also fixing a small bug in getting the update clearence for VLD1LNd32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178134 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Hexagon: Disable optimizations at O0.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178132 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27Improve performance of LinkModules when linking with modules with large ↵James Molloy
numbers of functions which link lazily. Instead of creating and destroying function prototypes irrespective of if they are used, only create them if they are used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178130 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27R600/SI: add cummuting of rev instructionsChristian Konig
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178127 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-27R600/SI: add mulhu/mulhs patternsChristian Konig
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Tested-by: Michel Dänzer <michel.daenzer@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178126 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-04-04 16:11:12 +0000