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2013-05-10Fixing MCJIT unit test on Windows.release_33Andrew Kaylor
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181625 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-10Merging r181397:Bill Wendling
------------------------------------------------------------------------ r181397 | nicholas | 2013-05-08 02:00:10 -0700 (Wed, 08 May 2013) | 3 lines Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInst by switching to a ValueMap. Patch by Andrea DiBiagio! ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181619 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09Merging r181423:Bill Wendling
------------------------------------------------------------------------ r181423 | hfinkel | 2013-05-08 05:16:14 -0700 (Wed, 08 May 2013) | 5 lines PPCInstrInfo::optimizeCompareInstr should not optimize FP compares The floating-point record forms on PPC don't set the condition register bits based on a comparison with zero (like the integer record forms do), but rather based on the exception status bits. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181507 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merging r181286:Bill Wendling
------------------------------------------------------------------------ r181286 | arnolds | 2013-05-06 21:37:05 -0700 (Mon, 06 May 2013) | 7 lines LoopVectorize: getConsecutiveVector must respect signed arithmetic We were passing an i32 to ConstantInt::get where an i64 was needed and we must also pass the sign if we pass negatives numbers. The start index passed to getConsecutiveVector must also be signed. Should fix PR15882. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merge of r181434Richard Sandiford
Add myself as SystemZ code owner git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181435 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merge of r181431Richard Sandiford
Add SystemZ feats to CodeGenerator.rst git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181432 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merge of r181328Richard Sandiford
Mention SystemZ in the release notes git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181427 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merge of r181312Richard Sandiford
[SystemZ] Fix InitMCCodeGenInfo call createSystemZMCCodeGenInfo was not passing the optimization level to InitMCCodeGenInfo(), so -O0 would be ignored. Fixes DebugInfo/namespace.ll after the changes in r181271. git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181419 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Update to ToT's version.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181403 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merging r181313:Bill Wendling
------------------------------------------------------------------------ r181313 | mkuper | 2013-05-07 07:05:33 -0700 (Tue, 07 May 2013) | 1 line Re-enable AVX detection on x64 platforms. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181399 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Turn off binary comparison for 3.3 release.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181398 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Merging r181296:Bill Wendling
------------------------------------------------------------------------ r181296 | timurrrr | 2013-05-07 00:47:47 -0700 (Tue, 07 May 2013) | 1 line Fix the VS2010 build broken by r181271 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181379 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-07Creating release_33 branchBill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_33@181273 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06DebugInfo: Support imported modules in lexical blocksDavid Blaikie
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181271 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add intrinsic for MIMG IMAGE_GET_RESINFO opcodeTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181269 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Handle arbitrary destination type in SITargetLowering::adjustWritemaskTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181268 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add intrinsic for texture image loadingTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181267 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add pattern for uint_to_fpTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add patterns for integer maxima / minimaTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181265 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600/SI: Add pattern for AMDGPU.trunc intrinsicTom Stellard
Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Tom Stellard <thomas.stellard@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181263 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Print IR from Hexagon MI passes with -print-before/after-all.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181255 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Implemented public interface for modifying registered (not positional or ↵Andrew Trick
sink options) command line options at runtime. Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181254 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Support command line option categories.Andrew Trick
Patch by Dan Liew! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181253 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Cleanup of the HexagonTargetMachine setup.Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181250 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06InstCombine: (X ^ signbit) + C -> X + (signbit ^ C)David Majnemer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181249 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Hoist boundary condition out of loop header.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181248 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Untabify.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181247 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Reduce attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Split Alignment out of the Section Characteristics.Rafael Espindola
The alignment is just a byte in the middle of Characteristics, not an independent flag. Making it an independent field in the yaml representation makes it more yamlio friendly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181243 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Hexagon: Add multiclass/encoding bits for the New-Value Jump instructions.Jyotsna Verma
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181235 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Test results verified using FileCheck rather than grep | countJean-Luc Duprat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181234 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Make references to HexagonTargetMachine "const".Krzysztof Parzyszek
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181233 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Remove some redundant includes in llvm-mc.cpp.Rafael Espindola
Patch by Jun Koi! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181231 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Rotate multi-exit loops even if the latch was simplified.Andrew Trick
Test case by Michele Scandale! Fixes PR10293: Load not hoisted out of loop with multiple exits. There are few regressions with this patch, now tracked by rdar:13817079, and a roughly equal number of improvements. The regressions are almost certainly back luck because LoopRotate has very little idea of whether rotation is profitable. Doing better requires a more comprehensive solution. This checkin is a quick fix that lacks generality (PR10293 has a counter-example). But it trivially fixes the case in PR10293 without interfering with other cases, and it does satify the criteria that LoopRotate is a loop canonicalization pass that should avoid heuristics and special cases. I can think of two approaches that would probably be better in the long run. Ultimately they may both make sense. (1) LoopRotate should check that the current header would make a good loop guard, and that the loop does not already has a sufficient guard. The artifical SimplifiedLoopLatch check would be unnecessary, and the design would be more general and canonical. Two difficulties: - We need a strong guarantee that we won't endlessly rotate, so the analysis would need to be precise in order to avoid the SimplifiedLoopLatch precondition. - Analysis like this are usually based on SCEV, which we don't want to rely on. (2) Rotate on-demand in late loop passes. This could even be done by shoving the loop back on the queue after the optimization that needs it. This could work well when we find LICM opportunities in multi-branch loops. This requires some work, and it doesn't really solve the problem of SCEV wanting a loop guard before the analysis. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181230 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Remove dead code from the CodeEmitter v2Tom Stellard
v2: - Replace switch statement with TSFlags query Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181229 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Emit config values in register / value pairsTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181228 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Remove unnecessary instance variable and rework logic accordingly.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181227 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Grammar.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181226 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Stop emitting the instruction type byte before each instructionTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181225 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Don't emit .dwo sections unless they exist.Eric Christopher
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181224 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06R600: Emit ISA for CALL_FS_* instructionsTom Stellard
Reviewed-by: Vincent Lejeune <vljn@ovi.com> Tested-By: Aaron Watry <awatry@gmail.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181223 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Update non-pic DWARF encodingsUlrich Weigand
As pointed out by Rafael Espindola, we should match the DWARF encodings produced by GCC in both pic and non-pic modes. This was not the case for the non-pic case. This patch changes all DWARF encodings to DW_EH_PE_absptr for the non-pic case, just like GCC does. The test case is updated to check for both variants. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181222 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06PowerPC: Fix unimplemented relocation on ppc64Adhemerval Zanella
This patch handles the R_PPC64_REL64 relocation type for powerpc64 for mcjit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181220 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Fix add4.ll test cmdline so that it passesJean-Luc Duprat
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181219 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Provide InstCombines for the following 3 cases:Jean-Luc Duprat
A * (1 - (uitofp i1 C)) -> select C, 0, A B * (uitofp i1 C) -> select C, B, 0 select C, 0, A + select C, B, 0 -> select C, B, A These come up in code that has been hand-optimized from a select to a linear blend, on platforms where that may have mattered. We want to undo such changes with the following transform: A*(1 - uitofp i1 C) + B*(uitofp i1 C) -> select C, A, B git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06AArch64: use MCJIT by default and enable related tests.Tim Northover
This just enables some testing I'd missed after implementing MCJIT support. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181215 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Add to --enable-targets=allUlrich Weigand
This patch finally enables the SystemZ target in the default build (with --enable-targets=all). Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181209 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Add configure bitsUlrich Weigand
This patch wires up the SystemZ target in configure, so that it can now be built using --enable-targets=systemz. It is not yet included in the default build (--enable-targets=all); this will be done by a follow-up patch. Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181208 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Set up JIT/MCJIT test casesUlrich Weigand
This patch adds the necessary configuration bits and #ifdef's to set up the JIT/MCJIT test cases for SystemZ. Like other recent targets, we do fully support MCJIT, but do not support the old JIT at all. Set up the lit config files accordingly, and disable old-JIT unit tests. Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181207 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06[SystemZ] Add MC test casesUlrich Weigand
This adds all MC tests for the SystemZ target. Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181206 91177308-0d34-0410-b5e6-96231b3b80d8
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