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-rw-r--r--test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll16
-rw-r--r--test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll17
-rw-r--r--test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll19
-rw-r--r--test/CodeGen/Blackfin/2009-08-15-MissingDead.ll25
-rw-r--r--test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll16
-rw-r--r--test/CodeGen/Blackfin/add-overflow.ll18
-rw-r--r--test/CodeGen/Blackfin/add.ll5
-rw-r--r--test/CodeGen/Blackfin/addsub-i128.ll42
-rw-r--r--test/CodeGen/Blackfin/basic-i1.ll51
-rw-r--r--test/CodeGen/Blackfin/basic-i16.ll36
-rw-r--r--test/CodeGen/Blackfin/basic-i32.ll51
-rw-r--r--test/CodeGen/Blackfin/basic-i64.ll51
-rw-r--r--test/CodeGen/Blackfin/basic-i8.ll51
-rw-r--r--test/CodeGen/Blackfin/basictest.ll19
-rw-r--r--test/CodeGen/Blackfin/cmp-small-imm.ll6
-rw-r--r--test/CodeGen/Blackfin/cmp64.ll17
-rw-r--r--test/CodeGen/Blackfin/ct32.ll20
-rw-r--r--test/CodeGen/Blackfin/ct64.ll20
-rw-r--r--test/CodeGen/Blackfin/ctlz16.ll18
-rw-r--r--test/CodeGen/Blackfin/ctlz64.ll15
-rw-r--r--test/CodeGen/Blackfin/ctpop16.ll18
-rw-r--r--test/CodeGen/Blackfin/cttz16.ll18
-rw-r--r--test/CodeGen/Blackfin/cycles.ll17
-rw-r--r--test/CodeGen/Blackfin/dg.exp5
-rw-r--r--test/CodeGen/Blackfin/double-cast.ll8
-rw-r--r--test/CodeGen/Blackfin/frameindex.ll10
-rw-r--r--test/CodeGen/Blackfin/i17mem.ll9
-rw-r--r--test/CodeGen/Blackfin/i1mem.ll9
-rw-r--r--test/CodeGen/Blackfin/i1ops.ll10
-rw-r--r--test/CodeGen/Blackfin/i216mem.ll9
-rw-r--r--test/CodeGen/Blackfin/i248mem.ll9
-rw-r--r--test/CodeGen/Blackfin/i256mem.ll9
-rw-r--r--test/CodeGen/Blackfin/i256param.ll7
-rw-r--r--test/CodeGen/Blackfin/i56param.ll8
-rw-r--r--test/CodeGen/Blackfin/i8mem.ll10
-rw-r--r--test/CodeGen/Blackfin/inline-asm.ll38
-rw-r--r--test/CodeGen/Blackfin/int-setcc.ll80
-rw-r--r--test/CodeGen/Blackfin/invalid-apint.ll15
-rw-r--r--test/CodeGen/Blackfin/jumptable.ll53
-rw-r--r--test/CodeGen/Blackfin/large-switch.ll187
-rw-r--r--test/CodeGen/Blackfin/load-i16.ll13
-rw-r--r--test/CodeGen/Blackfin/logic-i16.ll16
-rw-r--r--test/CodeGen/Blackfin/many-args.ll23
-rw-r--r--test/CodeGen/Blackfin/mulhu.ll106
-rw-r--r--test/CodeGen/Blackfin/printf.ll10
-rw-r--r--test/CodeGen/Blackfin/printf2.ll8
-rw-r--r--test/CodeGen/Blackfin/promote-logic.ll42
-rw-r--r--test/CodeGen/Blackfin/promote-setcc.ll37
-rw-r--r--test/CodeGen/Blackfin/sdiv.ll5
-rw-r--r--test/CodeGen/Blackfin/simple-select.ll11
-rw-r--r--test/CodeGen/Blackfin/switch.ll18
-rw-r--r--test/CodeGen/Blackfin/switch2.ll16
-rw-r--r--test/CodeGen/Blackfin/sync-intr.ll16
53 files changed, 0 insertions, 1363 deletions
diff --git a/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll b/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll
deleted file mode 100644
index 50fccb4409..0000000000
--- a/test/CodeGen/Blackfin/2009-08-04-LowerExtract-Live.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llc < %s -march=bfin -join-liveintervals=0 -verify-machineinstrs
-; RUN: llc < %s -march=bfin -join-liveintervals=0 -verify-machineinstrs -regalloc=greedy
-
-; Provoke an error in LowerSubregsPass::LowerExtract where the live range of a
-; super-register is illegally extended.
-
-define i16 @f(i16 %x1, i16 %x2, i16 %x3, i16 %x4) {
- %y1 = add i16 %x1, 1
- %y2 = add i16 %x2, 2
- %y3 = add i16 %x3, 3
- %y4 = add i16 %x4, 4
- %z12 = add i16 %y1, %y2
- %z34 = add i16 %y3, %y4
- %p = add i16 %z12, %z34
- ret i16 %p
-}
diff --git a/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll b/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll
deleted file mode 100644
index e5d1637a50..0000000000
--- a/test/CodeGen/Blackfin/2009-08-11-RegScavenger-CSR.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-declare i64 @llvm.cttz.i64(i64) nounwind readnone
-
-declare i16 @llvm.cttz.i16(i16) nounwind readnone
-
-declare i8 @llvm.cttz.i8(i8) nounwind readnone
-
-define void @cttztest(i8 %A, i16 %B, i32 %C, i64 %D, i8* %AP, i16* %BP, i32* %CP, i64* %DP) {
- %a = call i8 @llvm.cttz.i8(i8 %A) ; <i8> [#uses=1]
- %b = call i16 @llvm.cttz.i16(i16 %B) ; <i16> [#uses=1]
- %d = call i64 @llvm.cttz.i64(i64 %D) ; <i64> [#uses=1]
- store i8 %a, i8* %AP
- store i16 %b, i16* %BP
- store i64 %d, i64* %DP
- ret void
-}
diff --git a/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll b/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll
deleted file mode 100644
index 0b731dccd1..0000000000
--- a/test/CodeGen/Blackfin/2009-08-15-LiveIn-SubReg.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-; When joining live intervals of sub-registers, an MBB live-in list is not
-; updated properly. The register scavenger asserts on an undefined register.
-
-define i32 @foo(i8 %bar) {
-entry:
- switch i8 %bar, label %bb1203 [
- i8 117, label %bb1204
- i8 85, label %bb1204
- i8 106, label %bb1204
- ]
-
-bb1203: ; preds = %entry
- ret i32 1
-
-bb1204: ; preds = %entry, %entry, %entry
- ret i32 2
-}
diff --git a/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll b/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll
deleted file mode 100644
index dcc3ea0dec..0000000000
--- a/test/CodeGen/Blackfin/2009-08-15-MissingDead.ll
+++ /dev/null
@@ -1,25 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-; LocalRewriter can forget to transfer a <def,dead> flag when setting up call
-; argument registers. This then causes register scavenger asserts.
-
-declare i32 @printf(i8*, i32, float)
-
-define i32 @testissue(i32 %i, float %x, float %y) {
- br label %bb1
-
-bb1: ; preds = %bb1, %0
- %x2 = fmul float %x, 5.000000e-01 ; <float> [#uses=1]
- %y2 = fmul float %y, 0x3FECCCCCC0000000 ; <float> [#uses=1]
- %z2 = fadd float %x2, %y2 ; <float> [#uses=1]
- %z3 = fadd float undef, %z2 ; <float> [#uses=1]
- %i1 = shl i32 %i, 3 ; <i32> [#uses=1]
- %j1 = add i32 %i, 7 ; <i32> [#uses=1]
- %m1 = add i32 %i1, %j1 ; <i32> [#uses=2]
- %b = icmp sle i32 %m1, 6 ; <i1> [#uses=1]
- br i1 %b, label %bb1, label %bb2
-
-bb2: ; preds = %bb1
- %1 = call i32 @printf(i8* undef, i32 %m1, float %z3); <i32> [#uses=0]
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll b/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll
deleted file mode 100644
index b6cd2d40d1..0000000000
--- a/test/CodeGen/Blackfin/2009-08-15-SetCC-Undef.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-; An undef argument causes a setugt node to escape instruction selection.
-
-define void @bugt() {
-cond_next305:
- %tmp306307 = trunc i32 undef to i8 ; <i8> [#uses=1]
- %tmp308 = icmp ugt i8 %tmp306307, 6 ; <i1> [#uses=1]
- br i1 %tmp308, label %bb311, label %bb314
-
-bb311: ; preds = %cond_next305
- unreachable
-
-bb314: ; preds = %cond_next305
- ret void
-}
diff --git a/test/CodeGen/Blackfin/add-overflow.ll b/test/CodeGen/Blackfin/add-overflow.ll
deleted file mode 100644
index 8dcf3f84e9..0000000000
--- a/test/CodeGen/Blackfin/add-overflow.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
- %0 = type { i24, i1 } ; type %0
-
-define i1 @func2(i24 zeroext %v1, i24 zeroext %v2) nounwind {
-entry:
- %t = call %0 @llvm.uadd.with.overflow.i24(i24 %v1, i24 %v2) ; <%0> [#uses=1]
- %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1]
- br i1 %obit, label %carry, label %normal
-
-normal: ; preds = %entry
- ret i1 true
-
-carry: ; preds = %entry
- ret i1 false
-}
-
-declare %0 @llvm.uadd.with.overflow.i24(i24, i24) nounwind
diff --git a/test/CodeGen/Blackfin/add.ll b/test/CodeGen/Blackfin/add.ll
deleted file mode 100644
index 3311c03199..0000000000
--- a/test/CodeGen/Blackfin/add.ll
+++ /dev/null
@@ -1,5 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-define i32 @add(i32 %A, i32 %B) {
- %R = add i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
diff --git a/test/CodeGen/Blackfin/addsub-i128.ll b/test/CodeGen/Blackfin/addsub-i128.ll
deleted file mode 100644
index dd5610120b..0000000000
--- a/test/CodeGen/Blackfin/addsub-i128.ll
+++ /dev/null
@@ -1,42 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-; These functions have just the right size to annoy the register scavenger: They
-; use all the scratch registers, but not all the callee-saved registers.
-
-define void @test_add(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
-entry:
- %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
- %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
- %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
- %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
- %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
- %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
- %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
- %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
- %tmp15 = add i128 %tmp12, %tmp5 ; <i128> [#uses=2]
- %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
- store i64 %tmp1617, i64* %RL
- %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
- %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
- store i64 %tmp2122, i64* %RH
- ret void
-}
-
-define void @test_sub(i64 %AL, i64 %AH, i64 %BL, i64 %BH, i64* %RL, i64* %RH) {
-entry:
- %tmp1 = zext i64 %AL to i128 ; <i128> [#uses=1]
- %tmp23 = zext i64 %AH to i128 ; <i128> [#uses=1]
- %tmp4 = shl i128 %tmp23, 64 ; <i128> [#uses=1]
- %tmp5 = or i128 %tmp4, %tmp1 ; <i128> [#uses=1]
- %tmp67 = zext i64 %BL to i128 ; <i128> [#uses=1]
- %tmp89 = zext i64 %BH to i128 ; <i128> [#uses=1]
- %tmp11 = shl i128 %tmp89, 64 ; <i128> [#uses=1]
- %tmp12 = or i128 %tmp11, %tmp67 ; <i128> [#uses=1]
- %tmp15 = sub i128 %tmp5, %tmp12 ; <i128> [#uses=2]
- %tmp1617 = trunc i128 %tmp15 to i64 ; <i64> [#uses=1]
- store i64 %tmp1617, i64* %RL
- %tmp21 = lshr i128 %tmp15, 64 ; <i128> [#uses=1]
- %tmp2122 = trunc i128 %tmp21 to i64 ; <i64> [#uses=1]
- store i64 %tmp2122, i64* %RH
- ret void
-}
diff --git a/test/CodeGen/Blackfin/basic-i1.ll b/test/CodeGen/Blackfin/basic-i1.ll
deleted file mode 100644
index c63adaba06..0000000000
--- a/test/CodeGen/Blackfin/basic-i1.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: llc < %s -march=bfin > %t
-
-define i1 @add(i1 %A, i1 %B) {
- %R = add i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @sub(i1 %A, i1 %B) {
- %R = sub i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @mul(i1 %A, i1 %B) {
- %R = mul i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @sdiv(i1 %A, i1 %B) {
- %R = sdiv i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @udiv(i1 %A, i1 %B) {
- %R = udiv i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @srem(i1 %A, i1 %B) {
- %R = srem i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @urem(i1 %A, i1 %B) {
- %R = urem i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @and(i1 %A, i1 %B) {
- %R = and i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @or(i1 %A, i1 %B) {
- %R = or i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
-
-define i1 @xor(i1 %A, i1 %B) {
- %R = xor i1 %A, %B ; <i1> [#uses=1]
- ret i1 %R
-}
diff --git a/test/CodeGen/Blackfin/basic-i16.ll b/test/CodeGen/Blackfin/basic-i16.ll
deleted file mode 100644
index 541e9a8dc9..0000000000
--- a/test/CodeGen/Blackfin/basic-i16.ll
+++ /dev/null
@@ -1,36 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-define i16 @add(i16 %A, i16 %B) {
- %R = add i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @sub(i16 %A, i16 %B) {
- %R = sub i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @mul(i16 %A, i16 %B) {
- %R = mul i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @sdiv(i16 %A, i16 %B) {
- %R = sdiv i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @udiv(i16 %A, i16 %B) {
- %R = udiv i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @srem(i16 %A, i16 %B) {
- %R = srem i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @urem(i16 %A, i16 %B) {
- %R = urem i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
diff --git a/test/CodeGen/Blackfin/basic-i32.ll b/test/CodeGen/Blackfin/basic-i32.ll
deleted file mode 100644
index 4b5dbfcb95..0000000000
--- a/test/CodeGen/Blackfin/basic-i32.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-define i32 @add(i32 %A, i32 %B) {
- %R = add i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @sub(i32 %A, i32 %B) {
- %R = sub i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @mul(i32 %A, i32 %B) {
- %R = mul i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @sdiv(i32 %A, i32 %B) {
- %R = sdiv i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @udiv(i32 %A, i32 %B) {
- %R = udiv i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @srem(i32 %A, i32 %B) {
- %R = srem i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @urem(i32 %A, i32 %B) {
- %R = urem i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @and(i32 %A, i32 %B) {
- %R = and i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @or(i32 %A, i32 %B) {
- %R = or i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
-
-define i32 @xor(i32 %A, i32 %B) {
- %R = xor i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
diff --git a/test/CodeGen/Blackfin/basic-i64.ll b/test/CodeGen/Blackfin/basic-i64.ll
deleted file mode 100644
index d4dd8e2703..0000000000
--- a/test/CodeGen/Blackfin/basic-i64.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-define i64 @add(i64 %A, i64 %B) {
- %R = add i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @sub(i64 %A, i64 %B) {
- %R = sub i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @mul(i64 %A, i64 %B) {
- %R = mul i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @sdiv(i64 %A, i64 %B) {
- %R = sdiv i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @udiv(i64 %A, i64 %B) {
- %R = udiv i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @srem(i64 %A, i64 %B) {
- %R = srem i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @urem(i64 %A, i64 %B) {
- %R = urem i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @and(i64 %A, i64 %B) {
- %R = and i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @or(i64 %A, i64 %B) {
- %R = or i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
-
-define i64 @xor(i64 %A, i64 %B) {
- %R = xor i64 %A, %B ; <i64> [#uses=1]
- ret i64 %R
-}
diff --git a/test/CodeGen/Blackfin/basic-i8.ll b/test/CodeGen/Blackfin/basic-i8.ll
deleted file mode 100644
index 2c7ce9d101..0000000000
--- a/test/CodeGen/Blackfin/basic-i8.ll
+++ /dev/null
@@ -1,51 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-define i8 @add(i8 %A, i8 %B) {
- %R = add i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @sub(i8 %A, i8 %B) {
- %R = sub i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @mul(i8 %A, i8 %B) {
- %R = mul i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @sdiv(i8 %A, i8 %B) {
- %R = sdiv i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @udiv(i8 %A, i8 %B) {
- %R = udiv i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @srem(i8 %A, i8 %B) {
- %R = srem i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @urem(i8 %A, i8 %B) {
- %R = urem i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @and(i8 %A, i8 %B) {
- %R = and i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @or(i8 %A, i8 %B) {
- %R = or i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
-
-define i8 @xor(i8 %A, i8 %B) {
- %R = xor i8 %A, %B ; <i8> [#uses=1]
- ret i8 %R
-}
diff --git a/test/CodeGen/Blackfin/basictest.ll b/test/CodeGen/Blackfin/basictest.ll
deleted file mode 100644
index 85040df0fd..0000000000
--- a/test/CodeGen/Blackfin/basictest.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-define void @void(i32, i32) {
- add i32 0, 0 ; <i32>:3 [#uses=2]
- sub i32 0, 4 ; <i32>:4 [#uses=2]
- br label %5
-
-; <label>:5 ; preds = %5, %2
- add i32 %0, %1 ; <i32>:6 [#uses=2]
- sub i32 %6, %4 ; <i32>:7 [#uses=1]
- icmp sle i32 %7, %3 ; <i1>:8 [#uses=1]
- br i1 %8, label %9, label %5
-
-; <label>:9 ; preds = %5
- add i32 %0, %1 ; <i32>:10 [#uses=0]
- sub i32 %6, %4 ; <i32>:11 [#uses=1]
- icmp sle i32 %11, %3 ; <i1>:12 [#uses=0]
- ret void
-}
diff --git a/test/CodeGen/Blackfin/cmp-small-imm.ll b/test/CodeGen/Blackfin/cmp-small-imm.ll
deleted file mode 100644
index e1732a8f80..0000000000
--- a/test/CodeGen/Blackfin/cmp-small-imm.ll
+++ /dev/null
@@ -1,6 +0,0 @@
-; RUN: llc < %s -march=bfin > %t
-
-define i1 @cmp3(i32 %A) {
- %R = icmp uge i32 %A, 2
- ret i1 %R
-}
diff --git a/test/CodeGen/Blackfin/cmp64.ll b/test/CodeGen/Blackfin/cmp64.ll
deleted file mode 100644
index 6c4f9c5bd7..0000000000
--- a/test/CodeGen/Blackfin/cmp64.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-; This test tries to use a JustCC register as a data operand for MOVEcc. It
-; copies (JustCC -> DP), failing because JustCC can only be copied to D.
-; The proper solution would be to restrict the virtual register to D only.
-
-define i32 @main() {
-entry:
- br label %loopentry
-
-loopentry:
- %done = icmp sle i64 undef, 5
- br i1 %done, label %loopentry, label %exit.1
-
-exit.1:
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/ct32.ll b/test/CodeGen/Blackfin/ct32.ll
deleted file mode 100644
index 363286d4b2..0000000000
--- a/test/CodeGen/Blackfin/ct32.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i32 @llvm.ctlz.i32(i32)
-declare i32 @llvm.cttz.i32(i32)
-declare i32 @llvm.ctpop.i32(i32)
-
-define i32 @ctlztest(i32 %B) {
- %b = call i32 @llvm.ctlz.i32( i32 %B )
- ret i32 %b
-}
-
-define i32 @cttztest(i32 %B) {
- %b = call i32 @llvm.cttz.i32( i32 %B )
- ret i32 %b
-}
-
-define i32 @ctpoptest(i32 %B) {
- %b = call i32 @llvm.ctpop.i32( i32 %B )
- ret i32 %b
-}
diff --git a/test/CodeGen/Blackfin/ct64.ll b/test/CodeGen/Blackfin/ct64.ll
deleted file mode 100644
index 75024343ea..0000000000
--- a/test/CodeGen/Blackfin/ct64.ll
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i64 @llvm.ctlz.i64(i64)
-declare i64 @llvm.cttz.i64(i64)
-declare i64 @llvm.ctpop.i64(i64)
-
-define i64 @ctlztest(i64 %B) {
- %b = call i64 @llvm.ctlz.i64( i64 %B )
- ret i64 %b
-}
-
-define i64 @cttztest(i64 %B) {
- %b = call i64 @llvm.cttz.i64( i64 %B )
- ret i64 %b
-}
-
-define i64 @ctpoptest(i64 %B) {
- %b = call i64 @llvm.ctpop.i64( i64 %B )
- ret i64 %b
-}
diff --git a/test/CodeGen/Blackfin/ctlz16.ll b/test/CodeGen/Blackfin/ctlz16.ll
deleted file mode 100644
index eb4af232cf..0000000000
--- a/test/CodeGen/Blackfin/ctlz16.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i16 @llvm.ctlz.i16(i16)
-
-define i16 @ctlztest(i16 %B) {
- %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-define i16 @ctlztest_z(i16 zeroext %B) {
- %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
-define i16 @ctlztest_s(i16 signext %B) {
- %b = call i16 @llvm.ctlz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
diff --git a/test/CodeGen/Blackfin/ctlz64.ll b/test/CodeGen/Blackfin/ctlz64.ll
deleted file mode 100644
index 3e22f88435..0000000000
--- a/test/CodeGen/Blackfin/ctlz64.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
-@.str = external constant [14 x i8] ; <[14 x i8]*> [#uses=1]
-
-define i32 @main(i64 %arg) nounwind {
-entry:
- %tmp47 = tail call i64 @llvm.cttz.i64(i64 %arg) ; <i64> [#uses=1]
- %tmp48 = trunc i64 %tmp47 to i32 ; <i32> [#uses=1]
- %tmp40 = tail call i32 (i8*, ...)* @printf(i8* noalias getelementptr ([14 x i8]* @.str, i32 0, i32 0), i64 %arg, i32 0, i32 %tmp48, i32 0) nounwind ; <i32> [#uses=0]
- ret i32 0
-}
-
-declare i32 @printf(i8* noalias, ...) nounwind
-
-declare i64 @llvm.cttz.i64(i64) nounwind readnone
diff --git a/test/CodeGen/Blackfin/ctpop16.ll b/test/CodeGen/Blackfin/ctpop16.ll
deleted file mode 100644
index 8b6c07ef28..0000000000
--- a/test/CodeGen/Blackfin/ctpop16.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i16 @llvm.ctpop.i16(i16)
-
-define i16 @ctpoptest(i16 %B) {
- %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-define i16 @ctpoptest_z(i16 zeroext %B) {
- %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
-define i16 @ctpoptest_s(i16 signext %B) {
- %b = call i16 @llvm.ctpop.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
diff --git a/test/CodeGen/Blackfin/cttz16.ll b/test/CodeGen/Blackfin/cttz16.ll
deleted file mode 100644
index 510882ad41..0000000000
--- a/test/CodeGen/Blackfin/cttz16.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i16 @llvm.cttz.i16(i16)
-
-define i16 @cttztest(i16 %B) {
- %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-define i16 @cttztest_z(i16 zeroext %B) {
- %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
-define i16 @cttztest_s(i16 signext %B) {
- %b = call i16 @llvm.cttz.i16( i16 %B ) ; <i16> [#uses=1]
- ret i16 %b
-}
-
diff --git a/test/CodeGen/Blackfin/cycles.ll b/test/CodeGen/Blackfin/cycles.ll
deleted file mode 100644
index 6451c747bd..0000000000
--- a/test/CodeGen/Blackfin/cycles.ll
+++ /dev/null
@@ -1,17 +0,0 @@
-; RUN: llc < %s -march=bfin | FileCheck %s
-
-declare i64 @llvm.readcyclecounter()
-
-; CHECK: cycles
-; CHECK: cycles2
-define i64 @cyc64() {
- %tmp.1 = call i64 @llvm.readcyclecounter()
- ret i64 %tmp.1
-}
-
-; CHECK: cycles
-define i32@cyc32() {
- %tmp.1 = call i64 @llvm.readcyclecounter()
- %s = trunc i64 %tmp.1 to i32
- ret i32 %s
-}
diff --git a/test/CodeGen/Blackfin/dg.exp b/test/CodeGen/Blackfin/dg.exp
deleted file mode 100644
index 5fdbe5feb0..0000000000
--- a/test/CodeGen/Blackfin/dg.exp
+++ /dev/null
@@ -1,5 +0,0 @@
-load_lib llvm.exp
-
-if { [llvm_supports_target Blackfin] } {
- RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
-}
diff --git a/test/CodeGen/Blackfin/double-cast.ll b/test/CodeGen/Blackfin/double-cast.ll
deleted file mode 100644
index 815ca797d7..0000000000
--- a/test/CodeGen/Blackfin/double-cast.ll
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i32 @printf(i8*, ...)
-
-define i32 @main() {
- %1 = call i32 (i8*, ...)* @printf(i8* undef, double undef)
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/frameindex.ll b/test/CodeGen/Blackfin/frameindex.ll
deleted file mode 100644
index 7e677fbf18..0000000000
--- a/test/CodeGen/Blackfin/frameindex.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-declare i32 @SIM(i8*, i8*, i32, i32, i32, [256 x i32]*, i32, i32, i32)
-
-define void @foo() {
-bb0:
- %V = alloca [256 x i32], i32 256 ; <[256 x i32]*> [#uses=1]
- %0 = call i32 @SIM(i8* null, i8* null, i32 0, i32 0, i32 0, [256 x i32]* %V, i32 0, i32 0, i32 2) ; <i32> [#uses=0]
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i17mem.ll b/test/CodeGen/Blackfin/i17mem.ll
deleted file mode 100644
index bc5ade7416..0000000000
--- a/test/CodeGen/Blackfin/i17mem.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i17_l = external global i17 ; <i17*> [#uses=1]
-@i17_s = external global i17 ; <i17*> [#uses=1]
-
-define void @i17_ls() nounwind {
- %tmp = load i17* @i17_l ; <i17> [#uses=1]
- store i17 %tmp, i17* @i17_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i1mem.ll b/test/CodeGen/Blackfin/i1mem.ll
deleted file mode 100644
index cb03e3d7fc..0000000000
--- a/test/CodeGen/Blackfin/i1mem.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i1_l = external global i1 ; <i1*> [#uses=1]
-@i1_s = external global i1 ; <i1*> [#uses=1]
-
-define void @i1_ls() nounwind {
- %tmp = load i1* @i1_l ; <i1> [#uses=1]
- store i1 %tmp, i1* @i1_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i1ops.ll b/test/CodeGen/Blackfin/i1ops.ll
deleted file mode 100644
index 6b5612cc49..0000000000
--- a/test/CodeGen/Blackfin/i1ops.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-define i32 @adj(i32 %d.1, i32 %ct.1) {
-entry:
- %tmp.22.not = trunc i32 %ct.1 to i1 ; <i1> [#uses=1]
- %tmp.221 = xor i1 %tmp.22.not, true ; <i1> [#uses=1]
- %tmp.26 = or i1 false, %tmp.221 ; <i1> [#uses=1]
- %tmp.27 = zext i1 %tmp.26 to i32 ; <i32> [#uses=1]
- ret i32 %tmp.27
-}
diff --git a/test/CodeGen/Blackfin/i216mem.ll b/test/CodeGen/Blackfin/i216mem.ll
deleted file mode 100644
index 9f8cf48e87..0000000000
--- a/test/CodeGen/Blackfin/i216mem.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i216_l = external global i216 ; <i216*> [#uses=1]
-@i216_s = external global i216 ; <i216*> [#uses=1]
-
-define void @i216_ls() nounwind {
- %tmp = load i216* @i216_l ; <i216> [#uses=1]
- store i216 %tmp, i216* @i216_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i248mem.ll b/test/CodeGen/Blackfin/i248mem.ll
deleted file mode 100644
index db23f541ad..0000000000
--- a/test/CodeGen/Blackfin/i248mem.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=bfin
-@i248_l = external global i248 ; <i248*> [#uses=1]
-@i248_s = external global i248 ; <i248*> [#uses=1]
-
-define void @i248_ls() nounwind {
- %tmp = load i248* @i248_l ; <i248> [#uses=1]
- store i248 %tmp, i248* @i248_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i256mem.ll b/test/CodeGen/Blackfin/i256mem.ll
deleted file mode 100644
index bc5ade7416..0000000000
--- a/test/CodeGen/Blackfin/i256mem.ll
+++ /dev/null
@@ -1,9 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i17_l = external global i17 ; <i17*> [#uses=1]
-@i17_s = external global i17 ; <i17*> [#uses=1]
-
-define void @i17_ls() nounwind {
- %tmp = load i17* @i17_l ; <i17> [#uses=1]
- store i17 %tmp, i17* @i17_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i256param.ll b/test/CodeGen/Blackfin/i256param.ll
deleted file mode 100644
index df74c9a6e0..0000000000
--- a/test/CodeGen/Blackfin/i256param.ll
+++ /dev/null
@@ -1,7 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i256_s = external global i256 ; <i256*> [#uses=1]
-
-define void @i256_ls(i256 %x) nounwind {
- store i256 %x, i256* @i256_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i56param.ll b/test/CodeGen/Blackfin/i56param.ll
deleted file mode 100644
index ca0256391b..0000000000
--- a/test/CodeGen/Blackfin/i56param.ll
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@i56_l = external global i56 ; <i56*> [#uses=1]
-@i56_s = external global i56 ; <i56*> [#uses=1]
-
-define void @i56_ls(i56 %x) nounwind {
- store i56 %x, i56* @i56_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/i8mem.ll b/test/CodeGen/Blackfin/i8mem.ll
deleted file mode 100644
index ea3a67e499..0000000000
--- a/test/CodeGen/Blackfin/i8mem.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-@i8_l = external global i8 ; <i8*> [#uses=1]
-@i8_s = external global i8 ; <i8*> [#uses=1]
-
-define void @i8_ls() nounwind {
- %tmp = load i8* @i8_l ; <i8> [#uses=1]
- store i8 %tmp, i8* @i8_s
- ret void
-}
diff --git a/test/CodeGen/Blackfin/inline-asm.ll b/test/CodeGen/Blackfin/inline-asm.ll
deleted file mode 100644
index d623f6bd95..0000000000
--- a/test/CodeGen/Blackfin/inline-asm.ll
+++ /dev/null
@@ -1,38 +0,0 @@
-; RUN: llc < %s -march=bfin | FileCheck %s
-
-; Standard "r"
-; CHECK: r0 = r0 + r1;
-define i32 @add_r(i32 %A, i32 %B) {
- %R = call i32 asm "$0 = $1 + $2;", "=r,r,r"( i32 %A, i32 %B ) nounwind
- ret i32 %R
-}
-
-; Target "d"
-; CHECK: r0 = r0 - r1;
-define i32 @add_d(i32 %A, i32 %B) {
- %R = call i32 asm "$0 = $1 - $2;", "=d,d,d"( i32 %A, i32 %B ) nounwind
- ret i32 %R
-}
-
-; Target "a" for P-regs
-; CHECK: p0 = (p0 + p1) << 1;
-define i32 @add_a(i32 %A, i32 %B) {
- %R = call i32 asm "$0 = ($1 + $2) << 1;", "=a,a,a"( i32 %A, i32 %B ) nounwind
- ret i32 %R
-}
-
-; Target "z" for P0, P1, P2. This is not a real regclass
-; CHECK: p0 = (p0 + p1) << 2;
-define i32 @add_Z(i32 %A, i32 %B) {
- %R = call i32 asm "$0 = ($1 + $2) << 2;", "=z,z,z"( i32 %A, i32 %B ) nounwind
- ret i32 %R
-}
-
-; Target "C" for CC. This is a single register
-; CHECK: cc = p0 < p1;
-; CHECK: r0 = cc;
-define i32 @add_C(i32 %A, i32 %B) {
- %R = call i32 asm "$0 = $1 < $2;", "=C,z,z"( i32 %A, i32 %B ) nounwind
- ret i32 %R
-}
-
diff --git a/test/CodeGen/Blackfin/int-setcc.ll b/test/CodeGen/Blackfin/int-setcc.ll
deleted file mode 100644
index 6bd9f86a99..0000000000
--- a/test/CodeGen/Blackfin/int-setcc.ll
+++ /dev/null
@@ -1,80 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
-define fastcc void @Evaluate() {
-entry:
- br i1 false, label %cond_false186, label %cond_true
-
-cond_true: ; preds = %entry
- ret void
-
-cond_false186: ; preds = %entry
- br i1 false, label %cond_true293, label %bb203
-
-bb203: ; preds = %cond_false186
- ret void
-
-cond_true293: ; preds = %cond_false186
- br i1 false, label %cond_true298, label %cond_next317
-
-cond_true298: ; preds = %cond_true293
- br i1 false, label %cond_next518, label %cond_true397.preheader
-
-cond_next317: ; preds = %cond_true293
- ret void
-
-cond_true397.preheader: ; preds = %cond_true298
- ret void
-
-cond_next518: ; preds = %cond_true298
- br i1 false, label %bb1069, label %cond_true522
-
-cond_true522: ; preds = %cond_next518
- ret void
-
-bb1069: ; preds = %cond_next518
- br i1 false, label %cond_next1131, label %bb1096
-
-bb1096: ; preds = %bb1069
- ret void
-
-cond_next1131: ; preds = %bb1069
- br i1 false, label %cond_next1207, label %cond_true1150
-
-cond_true1150: ; preds = %cond_next1131
- ret void
-
-cond_next1207: ; preds = %cond_next1131
- br i1 false, label %cond_next1219, label %cond_true1211
-
-cond_true1211: ; preds = %cond_next1207
- ret void
-
-cond_next1219: ; preds = %cond_next1207
- br i1 false, label %cond_true1223, label %cond_next1283
-
-cond_true1223: ; preds = %cond_next1219
- br i1 false, label %cond_true1254, label %cond_true1264
-
-cond_true1254: ; preds = %cond_true1223
- br i1 false, label %bb1567, label %cond_true1369.preheader
-
-cond_true1264: ; preds = %cond_true1223
- ret void
-
-cond_next1283: ; preds = %cond_next1219
- ret void
-
-cond_true1369.preheader: ; preds = %cond_true1254
- ret void
-
-bb1567: ; preds = %cond_true1254
- %tmp1605 = load i8* null ; <i8> [#uses=1]
- %tmp1606 = icmp eq i8 %tmp1605, 0 ; <i1> [#uses=1]
- br i1 %tmp1606, label %cond_next1637, label %cond_true1607
-
-cond_true1607: ; preds = %bb1567
- ret void
-
-cond_next1637: ; preds = %bb1567
- ret void
-}
diff --git a/test/CodeGen/Blackfin/invalid-apint.ll b/test/CodeGen/Blackfin/invalid-apint.ll
deleted file mode 100644
index a8c01ba65f..0000000000
--- a/test/CodeGen/Blackfin/invalid-apint.ll
+++ /dev/null
@@ -1,15 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-; Assertion failed: (width < BitWidth && "Invalid APInt Truncate request"),
-; function trunc, file APInt.cpp, line 956.
-
-@str2 = external global [29 x i8]
-
-define void @printArgsNoRet(i32 %a1, float %a2, i8 %a3, double %a4, i8* %a5, i32 %a6, float %a7, i8 %a8, double %a9, i8* %a10, i32 %a11, float %a12, i8 %a13, double %a14, i8* %a15) {
-entry:
- %tmp17 = sext i8 %a13 to i32
- %tmp23 = call i32 (i8*, ...)* @printf(i8* getelementptr ([29 x i8]* @str2, i32 0, i64 0), i32 %a11, double 0.000000e+00, i32 %tmp17, double %a14, i32 0)
- ret void
-}
-
-declare i32 @printf(i8*, ...)
diff --git a/test/CodeGen/Blackfin/jumptable.ll b/test/CodeGen/Blackfin/jumptable.ll
deleted file mode 100644
index 263533c000..0000000000
--- a/test/CodeGen/Blackfin/jumptable.ll
+++ /dev/null
@@ -1,53 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s
-
-; CHECK: .section .rodata
-; CHECK: JTI0_0:
-; CHECK: .long .BB0_1
-
-define i32 @oper(i32 %op, i32 %A, i32 %B) {
-entry:
- switch i32 %op, label %bbx [
- i32 1 , label %bb1
- i32 2 , label %bb2
- i32 3 , label %bb3
- i32 4 , label %bb4
- i32 5 , label %bb5
- i32 6 , label %bb6
- i32 7 , label %bb7
- i32 8 , label %bb8
- i32 9 , label %bb9
- i32 10, label %bb10
- ]
-bb1:
- %R1 = add i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R1
-bb2:
- %R2 = sub i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R2
-bb3:
- %R3 = mul i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R3
-bb4:
- %R4 = sdiv i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R4
-bb5:
- %R5 = udiv i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R5
-bb6:
- %R6 = srem i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R6
-bb7:
- %R7 = urem i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R7
-bb8:
- %R8 = and i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R8
-bb9:
- %R9 = or i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R9
-bb10:
- %R10 = xor i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R10
-bbx:
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/large-switch.ll b/test/CodeGen/Blackfin/large-switch.ll
deleted file mode 100644
index 02d32ef85f..0000000000
--- a/test/CodeGen/Blackfin/large-switch.ll
+++ /dev/null
@@ -1,187 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-; The switch expansion uses a dynamic shl, and it produces a jumptable
-
-define void @athlon_fp_unit_ready_cost() {
-entry:
- switch i32 0, label %UnifiedReturnBlock [
- i32 -1, label %bb2063
- i32 19, label %bb2035
- i32 20, label %bb2035
- i32 21, label %bb2035
- i32 23, label %bb2035
- i32 24, label %bb2035
- i32 27, label %bb2035
- i32 32, label %bb2035
- i32 33, label %bb1994
- i32 35, label %bb2035
- i32 36, label %bb1994
- i32 90, label %bb1948
- i32 94, label %bb1948
- i32 95, label %bb1948
- i32 133, label %bb1419
- i32 135, label %bb1238
- i32 136, label %bb1238
- i32 137, label %bb1238
- i32 138, label %bb1238
- i32 139, label %bb1201
- i32 140, label %bb1201
- i32 141, label %bb1154
- i32 142, label %bb1126
- i32 144, label %bb1201
- i32 145, label %bb1126
- i32 146, label %bb1201
- i32 147, label %bb1126
- i32 148, label %bb1201
- i32 149, label %bb1126
- i32 150, label %bb1201
- i32 151, label %bb1126
- i32 152, label %bb1096
- i32 153, label %bb1096
- i32 154, label %bb1096
- i32 157, label %bb1096
- i32 158, label %bb1096
- i32 159, label %bb1096
- i32 162, label %bb1096
- i32 163, label %bb1096
- i32 164, label %bb1096
- i32 167, label %bb1201
- i32 168, label %bb1201
- i32 170, label %bb1201
- i32 171, label %bb1201
- i32 173, label %bb1201
- i32 174, label %bb1201
- i32 176, label %bb1201
- i32 177, label %bb1201
- i32 179, label %bb993
- i32 180, label %bb993
- i32 181, label %bb993
- i32 182, label %bb993
- i32 183, label %bb993
- i32 184, label %bb993
- i32 365, label %bb1126
- i32 366, label %bb1126
- i32 367, label %bb1126
- i32 368, label %bb1126
- i32 369, label %bb1126
- i32 370, label %bb1126
- i32 371, label %bb1126
- i32 372, label %bb1126
- i32 373, label %bb1126
- i32 384, label %bb1126
- i32 385, label %bb1126
- i32 386, label %bb1126
- i32 387, label %bb1126
- i32 388, label %bb1126
- i32 389, label %bb1126
- i32 390, label %bb1126
- i32 391, label %bb1126
- i32 392, label %bb1126
- i32 525, label %bb919
- i32 526, label %bb839
- i32 528, label %bb919
- i32 529, label %bb839
- i32 532, label %cond_next6.i97
- i32 533, label %cond_next6.i81
- i32 534, label %bb495
- i32 536, label %cond_next6.i81
- i32 537, label %cond_next6.i81
- i32 538, label %bb396
- i32 539, label %bb288
- i32 541, label %bb396
- i32 542, label %bb396
- i32 543, label %bb396
- i32 544, label %bb396
- i32 545, label %bb189
- i32 546, label %cond_next6.i
- i32 547, label %bb189
- i32 548, label %cond_next6.i
- i32 549, label %bb189
- i32 550, label %cond_next6.i
- i32 551, label %bb189
- i32 552, label %cond_next6.i
- i32 553, label %bb189
- i32 554, label %cond_next6.i
- i32 555, label %bb189
- i32 556, label %cond_next6.i
- i32 557, label %bb189
- i32 558, label %cond_next6.i
- i32 618, label %bb40
- i32 619, label %bb18
- i32 620, label %bb40
- i32 621, label %bb10
- i32 622, label %bb10
- ]
-
-bb10:
- ret void
-
-bb18:
- ret void
-
-bb40:
- ret void
-
-cond_next6.i:
- ret void
-
-bb189:
- ret void
-
-bb288:
- ret void
-
-bb396:
- ret void
-
-bb495:
- ret void
-
-cond_next6.i81:
- ret void
-
-cond_next6.i97:
- ret void
-
-bb839:
- ret void
-
-bb919:
- ret void
-
-bb993:
- ret void
-
-bb1096:
- ret void
-
-bb1126:
- ret void
-
-bb1154:
- ret void
-
-bb1201:
- ret void
-
-bb1238:
- ret void
-
-bb1419:
- ret void
-
-bb1948:
- ret void
-
-bb1994:
- ret void
-
-bb2035:
- ret void
-
-bb2063:
- ret void
-
-UnifiedReturnBlock:
- ret void
-}
diff --git a/test/CodeGen/Blackfin/load-i16.ll b/test/CodeGen/Blackfin/load-i16.ll
deleted file mode 100644
index eb18d410d0..0000000000
--- a/test/CodeGen/Blackfin/load-i16.ll
+++ /dev/null
@@ -1,13 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
-; This somewhat contrived function heavily exercises register classes
-; It can trick -join-cross-class-copies into making illegal joins
-
-define void @f(i16** nocapture %p) nounwind readonly {
-entry:
- %tmp1 = load i16** %p ; <i16*> [#uses=1]
- %tmp2 = load i16* %tmp1 ; <i16> [#uses=1]
- %ptr = getelementptr i16* %tmp1, i16 %tmp2
- store i16 %tmp2, i16* %ptr
- ret void
-}
diff --git a/test/CodeGen/Blackfin/logic-i16.ll b/test/CodeGen/Blackfin/logic-i16.ll
deleted file mode 100644
index e44672ff42..0000000000
--- a/test/CodeGen/Blackfin/logic-i16.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-define i16 @and(i16 %A, i16 %B) {
- %R = and i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @or(i16 %A, i16 %B) {
- %R = or i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
-
-define i16 @xor(i16 %A, i16 %B) {
- %R = xor i16 %A, %B ; <i16> [#uses=1]
- ret i16 %R
-}
diff --git a/test/CodeGen/Blackfin/many-args.ll b/test/CodeGen/Blackfin/many-args.ll
deleted file mode 100644
index 2df32ca354..0000000000
--- a/test/CodeGen/Blackfin/many-args.ll
+++ /dev/null
@@ -1,23 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-
- %0 = type { i32, float, float, float, float, float, float, float, float, float, float } ; type %0
- %struct..s_segment_inf = type { float, i32, i16, i16, float, float, i32, float, float }
-
-define i32 @main(i32 %argc.1, i8** %argv.1) {
-entry:
- %tmp.218 = load float* null ; <float> [#uses=1]
- %tmp.219 = getelementptr %0* null, i64 0, i32 6 ; <float*> [#uses=1]
- %tmp.220 = load float* %tmp.219 ; <float> [#uses=1]
- %tmp.221 = getelementptr %0* null, i64 0, i32 7 ; <float*> [#uses=1]
- %tmp.222 = load float* %tmp.221 ; <float> [#uses=1]
- %tmp.223 = getelementptr %0* null, i64 0, i32 8 ; <float*> [#uses=1]
- %tmp.224 = load float* %tmp.223 ; <float> [#uses=1]
- %tmp.225 = getelementptr %0* null, i64 0, i32 9 ; <float*> [#uses=1]
- %tmp.226 = load float* %tmp.225 ; <float> [#uses=1]
- %tmp.227 = getelementptr %0* null, i64 0, i32 10 ; <float*> [#uses=1]
- %tmp.228 = load float* %tmp.227 ; <float> [#uses=1]
- call void @place_and_route(i32 0, i32 0, float 0.000000e+00, i32 0, i32 0, i8* null, i32 0, i32 0, i8* null, i8* null, i8* null, i8* null, i32 0, i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i32 0, i32 0, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, i32 0, i32 0, i16 0, i16 0, i16 0, float 0.000000e+00, float 0.000000e+00, %struct..s_segment_inf* null, i32 0, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float %tmp.218, float %tmp.220, float %tmp.222, float %tmp.224, float %tmp.226, float %tmp.228)
- ret i32 0
-}
-
-declare void @place_and_route(i32, i32, float, i32, i32, i8*, i32, i32, i8*, i8*, i8*, i8*, i32, i32, i32, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, float, float, float, i32, i32, i16, i16, i16, float, float, %struct..s_segment_inf*, i32, float, float, float, float, float, float, float, float, float, float)
diff --git a/test/CodeGen/Blackfin/mulhu.ll b/test/CodeGen/Blackfin/mulhu.ll
deleted file mode 100644
index 72bacee33e..0000000000
--- a/test/CodeGen/Blackfin/mulhu.ll
+++ /dev/null
@@ -1,106 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
- %struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
- %struct.VEC_edge = type { i32, i32, [1 x %struct.edge_def*] }
- %struct._obstack_chunk = type { i8*, %struct._obstack_chunk*, [4 x i8] }
- %struct.basic_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.tree_node*, %struct.VEC_edge*, %struct.VEC_edge*, %struct.bitmap_head_def*, %struct.bitmap_head_def*, i8*, %struct.loop*, [2 x %struct.et_node*], %struct.basic_block_def*, %struct.basic_block_def*, %struct.reorder_block_def*, %struct.bb_ann_d*, i64, i32, i32, i32, i32 }
- %struct.bb_ann_d = type { %struct.tree_node*, i8, %struct.edge_prediction* }
- %struct.bitmap_element_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, [4 x i32] }
- %struct.bitmap_head_def = type { %struct.bitmap_element_def*, %struct.bitmap_element_def*, i32, %struct.bitmap_obstack* }
- %struct.bitmap_obstack = type { %struct.bitmap_element_def*, %struct.bitmap_head_def*, %struct.obstack }
- %struct.cost_pair = type { %struct.iv_cand*, i32, %struct.bitmap_head_def* }
- %struct.dataflow_d = type { %struct.varray_head_tag*, [2 x %struct.tree_node*] }
- %struct.def_operand_ptr = type { %struct.tree_node** }
- %struct.def_optype_d = type { i32, [1 x %struct.def_operand_ptr] }
- %struct.edge_def = type { %struct.basic_block_def*, %struct.basic_block_def*, %struct.edge_def_insns, i8*, %struct.location_t*, i32, i32, i64, i32 }
- %struct.edge_def_insns = type { %struct.rtx_def* }
- %struct.edge_prediction = type { %struct.edge_prediction*, %struct.edge_def*, i32, i32 }
- %struct.eh_status = type opaque
- %struct.emit_status = type { i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack*, i32, %struct.location_t, i32, i8*, %struct.rtx_def** }
- %struct.et_node = type opaque
- %struct.expr_status = type { i32, i32, i32, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def* }
- %struct.function = type { %struct.eh_status*, %struct.expr_status*, %struct.emit_status*, %struct.varasm_status*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.function*, i32, i32, i32, i32, %struct.rtx_def*, %struct.CUMULATIVE_ARGS, %struct.rtx_def*, %struct.rtx_def*, %struct.initial_value_struct*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i8, i32, i64, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, %struct.varray_head_tag*, %struct.temp_slot*, i32, %struct.var_refs_queue*, i32, i32, %struct.rtvec_def*, %struct.tree_node*, i32, i32, i32, %struct.machine_function*, i32, i32, i1, i1, %struct.language_function*, %struct.rtx_def*, i32, i32, i32, i32, %struct.location_t, %struct.varray_head_tag*, %struct.tree_node*, i8, i8, i8 }
- %struct.htab = type { i32 (i8*)*, i32 (i8*, i8*)*, void (i8*)*, i8**, i32, i32, i32, i32, i32, i8* (i32, i32)*, void (i8*)*, i8*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i32 }
- %struct.initial_value_struct = type opaque
- %struct.iv = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, i1, i1, i32 }
- %struct.iv_cand = type { i32, i1, i32, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.iv*, i32 }
- %struct.iv_use = type { i32, i32, %struct.iv*, %struct.tree_node*, %struct.tree_node**, %struct.bitmap_head_def*, i32, %struct.cost_pair*, %struct.iv_cand* }
- %struct.ivopts_data = type { %struct.loop*, %struct.htab*, i32, %struct.version_info*, %struct.bitmap_head_def*, i32, %struct.varray_head_tag*, %struct.varray_head_tag*, %struct.bitmap_head_def*, i1 }
- %struct.lang_decl = type opaque
- %struct.language_function = type opaque
- %struct.location_t = type { i8*, i32 }
- %struct.loop = type { i32, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.lpt_decision, i32, i32, %struct.edge_def**, i32, %struct.basic_block_def*, %struct.basic_block_def*, i32, %struct.edge_def**, i32, %struct.edge_def**, i32, %struct.simple_bitmap_def*, i32, %struct.loop**, i32, %struct.loop*, %struct.loop*, %struct.loop*, %struct.loop*, i32, i8*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, %struct.rtx_def*, i32, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound*, %struct.edge_def*, i1 }
- %struct.lpt_decision = type { i32, i32 }
- %struct.machine_function = type { %struct.stack_local_entry*, i8*, %struct.rtx_def*, i32, i32, i32, i32, i32 }
- %struct.nb_iter_bound = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.nb_iter_bound* }
- %struct.obstack = type { i32, %struct._obstack_chunk*, i8*, i8*, i8*, i32, i32, %struct._obstack_chunk* (i8*, i32)*, void (i8*, %struct._obstack_chunk*)*, i8*, i8 }
- %struct.reorder_block_def = type { %struct.rtx_def*, %struct.rtx_def*, %struct.basic_block_def*, %struct.basic_block_def*, %struct.basic_block_def*, i32, i32, i32 }
- %struct.rtvec_def = type { i32, [1 x %struct.rtx_def*] }
- %struct.rtx_def = type { i16, i8, i8, %struct.u }
- %struct.sequence_stack = type { %struct.rtx_def*, %struct.rtx_def*, %struct.sequence_stack* }
- %struct.simple_bitmap_def = type { i32, i32, i32, [1 x i64] }
- %struct.stack_local_entry = type opaque
- %struct.stmt_ann_d = type { %struct.tree_ann_common_d, i8, %struct.basic_block_def*, %struct.stmt_operands_d, %struct.dataflow_d*, %struct.bitmap_head_def*, i32 }
- %struct.stmt_operands_d = type { %struct.def_optype_d*, %struct.def_optype_d*, %struct.v_may_def_optype_d*, %struct.vuse_optype_d*, %struct.v_may_def_optype_d* }
- %struct.temp_slot = type opaque
- %struct.tree_ann_common_d = type { i32, i8*, %struct.tree_node* }
- %struct.tree_ann_d = type { %struct.stmt_ann_d }
- %struct.tree_common = type { %struct.tree_node*, %struct.tree_node*, %struct.tree_ann_d*, i8, i8, i8, i8, i8 }
- %struct.tree_decl = type { %struct.tree_common, %struct.location_t, i32, %struct.tree_node*, i8, i8, i8, i8, i8, i8, i8, i32, %struct.tree_decl_u1, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.tree_node*, %struct.rtx_def*, i32, %struct.tree_decl_u2, %struct.tree_node*, %struct.tree_node*, i64, %struct.lang_decl* }
- %struct.tree_decl_u1 = type { i64 }
- %struct.tree_decl_u2 = type { %struct.function* }
- %struct.tree_node = type { %struct.tree_decl }
- %struct.u = type { [1 x i64] }
- %struct.v_def_use_operand_type_t = type { %struct.tree_node*, %struct.tree_node* }
- %struct.v_may_def_optype_d = type { i32, [1 x %struct.v_def_use_operand_type_t] }
- %struct.var_refs_queue = type { %struct.rtx_def*, i32, i32, %struct.var_refs_queue* }
- %struct.varasm_status = type opaque
- %struct.varray_head_tag = type { i32, i32, i32, i8*, %struct.u }
- %struct.version_info = type { %struct.tree_node*, %struct.iv*, i1, i32, i1 }
- %struct.vuse_optype_d = type { i32, [1 x %struct.tree_node*] }
-
-define i1 @determine_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand) {
-entry:
- switch i32 0, label %bb91 [
- i32 0, label %bb
- i32 1, label %bb6
- i32 3, label %cond_next135
- ]
-
-bb: ; preds = %entry
- ret i1 false
-
-bb6: ; preds = %entry
- br i1 false, label %bb87, label %cond_next27
-
-cond_next27: ; preds = %bb6
- br i1 false, label %cond_true30, label %cond_next55
-
-cond_true30: ; preds = %cond_next27
- br i1 false, label %cond_next41, label %cond_true35
-
-cond_true35: ; preds = %cond_true30
- ret i1 false
-
-cond_next41: ; preds = %cond_true30
- %tmp44 = call i32 @force_var_cost(%struct.ivopts_data* %data, %struct.tree_node* null, %struct.bitmap_head_def** null) ; <i32> [#uses=1]
- %tmp46 = udiv i32 %tmp44, 5 ; <i32> [#uses=1]
- call void @set_use_iv_cost(%struct.ivopts_data* %data, %struct.iv_use* %use, %struct.iv_cand* %cand, i32 %tmp46, %struct.bitmap_head_def* null)
- br label %bb87
-
-cond_next55: ; preds = %cond_next27
- ret i1 false
-
-bb87: ; preds = %cond_next41, %bb6
- ret i1 false
-
-bb91: ; preds = %entry
- ret i1 false
-
-cond_next135: ; preds = %entry
- ret i1 false
-}
-
-declare void @set_use_iv_cost(%struct.ivopts_data*, %struct.iv_use*, %struct.iv_cand*, i32, %struct.bitmap_head_def*)
-
-declare i32 @force_var_cost(%struct.ivopts_data*, %struct.tree_node*, %struct.bitmap_head_def**)
diff --git a/test/CodeGen/Blackfin/printf.ll b/test/CodeGen/Blackfin/printf.ll
deleted file mode 100644
index 9e54b73c87..0000000000
--- a/test/CodeGen/Blackfin/printf.ll
+++ /dev/null
@@ -1,10 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-@.str_1 = external constant [42 x i8] ; <[42 x i8]*> [#uses=1]
-
-declare i32 @printf(i8*, ...)
-
-define i32 @main(i32 %argc.1, i8** %argv.1) {
-entry:
- %tmp.16 = call i32 (i8*, ...)* @printf(i8* getelementptr ([42 x i8]* @.str_1, i64 0, i64 0), i32 0, i32 0, i64 0, i64 0)
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/printf2.ll b/test/CodeGen/Blackfin/printf2.ll
deleted file mode 100644
index 7ac7e8032b..0000000000
--- a/test/CodeGen/Blackfin/printf2.ll
+++ /dev/null
@@ -1,8 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-declare i32 @printf(i8*, ...)
-
-define i32 @main() {
- %1 = call i32 (i8*, ...)* @printf(i8* undef, i1 undef)
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/promote-logic.ll b/test/CodeGen/Blackfin/promote-logic.ll
deleted file mode 100644
index 1ac1408290..0000000000
--- a/test/CodeGen/Blackfin/promote-logic.ll
+++ /dev/null
@@ -1,42 +0,0 @@
-; RUN: llc < %s -march=bfin
-
-; DAGCombiner::SimplifyBinOpWithSameOpcodeHands can produce an illegal i16 OR
-; operation after LegalizeOps.
-
-define void @mng_display_bgr565() {
-entry:
- br i1 false, label %bb.preheader, label %return
-
-bb.preheader:
- br i1 false, label %cond_true48, label %cond_next80
-
-cond_true48:
- %tmp = load i8* null
- %tmp51 = zext i8 %tmp to i16
- %tmp99 = load i8* null
- %tmp54 = bitcast i8 %tmp99 to i8
- %tmp54.upgrd.1 = zext i8 %tmp54 to i32
- %tmp55 = lshr i32 %tmp54.upgrd.1, 3
- %tmp55.upgrd.2 = trunc i32 %tmp55 to i16
- %tmp52 = shl i16 %tmp51, 5
- %tmp56 = and i16 %tmp55.upgrd.2, 28
- %tmp57 = or i16 %tmp56, %tmp52
- %tmp60 = zext i16 %tmp57 to i32
- %tmp62 = xor i32 0, 65535
- %tmp63 = mul i32 %tmp60, %tmp62
- %tmp65 = add i32 0, %tmp63
- %tmp69 = add i32 0, %tmp65
- %tmp70 = lshr i32 %tmp69, 16
- %tmp70.upgrd.3 = trunc i32 %tmp70 to i16
- %tmp75 = lshr i16 %tmp70.upgrd.3, 8
- %tmp75.upgrd.4 = trunc i16 %tmp75 to i8
- %tmp76 = lshr i8 %tmp75.upgrd.4, 5
- store i8 %tmp76, i8* null
- ret void
-
-cond_next80:
- ret void
-
-return:
- ret void
-}
diff --git a/test/CodeGen/Blackfin/promote-setcc.ll b/test/CodeGen/Blackfin/promote-setcc.ll
deleted file mode 100644
index d344fadbf3..0000000000
--- a/test/CodeGen/Blackfin/promote-setcc.ll
+++ /dev/null
@@ -1,37 +0,0 @@
-; RUN: llc < %s -march=bfin > %t
-
-; The DAG combiner may sometimes create illegal i16 SETCC operations when run
-; after LegalizeOps. Try to tease out all the optimizations in
-; TargetLowering::SimplifySetCC.
-
-@x = external global i16
-@y = external global i16
-
-declare i16 @llvm.ctlz.i16(i16)
-
-; Case (srl (ctlz x), 5) == const
-; Note: ctlz is promoted, so this test does not catch the DAG combiner
-define i1 @srl_ctlz_const() {
- %x = load i16* @x
- %c = call i16 @llvm.ctlz.i16(i16 %x)
- %s = lshr i16 %c, 4
- %r = icmp eq i16 %s, 1
- ret i1 %r
-}
-
-; Case (zext x) == const
-define i1 @zext_const() {
- %x = load i16* @x
- %r = icmp ugt i16 %x, 1
- ret i1 %r
-}
-
-; Case (sext x) == const
-define i1 @sext_const() {
- %x = load i16* @x
- %y = add i16 %x, 1
- %x2 = sext i16 %y to i32
- %r = icmp ne i32 %x2, -1
- ret i1 %r
-}
-
diff --git a/test/CodeGen/Blackfin/sdiv.ll b/test/CodeGen/Blackfin/sdiv.ll
deleted file mode 100644
index 1426655ba0..0000000000
--- a/test/CodeGen/Blackfin/sdiv.ll
+++ /dev/null
@@ -1,5 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs
-define i32 @sdiv(i32 %A, i32 %B) {
- %R = sdiv i32 %A, %B ; <i32> [#uses=1]
- ret i32 %R
-}
diff --git a/test/CodeGen/Blackfin/simple-select.ll b/test/CodeGen/Blackfin/simple-select.ll
deleted file mode 100644
index 0f7f270967..0000000000
--- a/test/CodeGen/Blackfin/simple-select.ll
+++ /dev/null
@@ -1,11 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
-declare i1 @foo()
-
-define i32 @test(i32* %A, i32* %B) {
- %a = load i32* %A
- %b = load i32* %B
- %cond = call i1 @foo()
- %c = select i1 %cond, i32 %a, i32 %b
- ret i32 %c
-}
diff --git a/test/CodeGen/Blackfin/switch.ll b/test/CodeGen/Blackfin/switch.ll
deleted file mode 100644
index 3680ec6e55..0000000000
--- a/test/CodeGen/Blackfin/switch.ll
+++ /dev/null
@@ -1,18 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
-define i32 @foo(i32 %A, i32 %B, i32 %C) {
-entry:
- switch i32 %A, label %out [
- i32 1, label %bb
- i32 0, label %bb13
- ]
-
-bb: ; preds = %entry
- ret i32 1
-
-bb13: ; preds = %entry
- ret i32 1
-
-out: ; preds = %entry
- ret i32 0
-}
diff --git a/test/CodeGen/Blackfin/switch2.ll b/test/CodeGen/Blackfin/switch2.ll
deleted file mode 100644
index 7877bce9c3..0000000000
--- a/test/CodeGen/Blackfin/switch2.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs > %t
-
-define i8* @FindChar(i8* %CurPtr) {
-entry:
- br label %bb
-
-bb: ; preds = %bb, %entry
- %tmp = load i8* null ; <i8> [#uses=1]
- switch i8 %tmp, label %bb [
- i8 0, label %bb7
- i8 120, label %bb7
- ]
-
-bb7: ; preds = %bb, %bb
- ret i8* null
-}
diff --git a/test/CodeGen/Blackfin/sync-intr.ll b/test/CodeGen/Blackfin/sync-intr.ll
deleted file mode 100644
index 0b103a3bf7..0000000000
--- a/test/CodeGen/Blackfin/sync-intr.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llc < %s -march=bfin -verify-machineinstrs | FileCheck %s
-
-define void @f() nounwind {
-entry:
- ; CHECK-NOT: llvm.bfin
- ; CHECK: csync;
- call void @llvm.bfin.csync()
-
- ; CHECK-NOT: llvm.bfin
- ; CHECK: ssync;
- call void @llvm.bfin.ssync()
- ret void
-}
-
-declare void @llvm.bfin.csync() nounwind
-declare void @llvm.bfin.ssync() nounwind