diff options
Diffstat (limited to 'test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll')
| -rw-r--r-- | test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll | 64 |
1 files changed, 56 insertions, 8 deletions
diff --git a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll index 4cd3be35e8..fa3d5fbcdc 100644 --- a/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll +++ b/test/CodeGen/X86/2010-04-23-mmx-movdq2q.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s +; There are no MMX operations here, so we use XMM or i64. define void @ti8(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <8 x i8> -; CHECK: movdq2q %tmp2 = bitcast double %b to <8 x i8> -; CHECK: movdq2q %tmp3 = add <8 x i8> %tmp1, %tmp2 +; CHECK: paddb %xmm1, %xmm0 store <8 x i8> %tmp3, <8 x i8>* null ret void } @@ -14,10 +14,9 @@ entry: define void @ti16(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <4 x i16> -; CHECK: movdq2q %tmp2 = bitcast double %b to <4 x i16> -; CHECK: movdq2q %tmp3 = add <4 x i16> %tmp1, %tmp2 +; CHECK: paddw %xmm1, %xmm0 store <4 x i16> %tmp3, <4 x i16>* null ret void } @@ -25,10 +24,9 @@ entry: define void @ti32(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <2 x i32> -; CHECK: movdq2q %tmp2 = bitcast double %b to <2 x i32> -; CHECK: movdq2q %tmp3 = add <2 x i32> %tmp1, %tmp2 +; CHECK: paddd %xmm1, %xmm0 store <2 x i32> %tmp3, <2 x i32>* null ret void } @@ -36,10 +34,60 @@ entry: define void @ti64(double %a, double %b) nounwind { entry: %tmp1 = bitcast double %a to <1 x i64> -; CHECK: movdq2q %tmp2 = bitcast double %b to <1 x i64> -; CHECK: movdq2q %tmp3 = add <1 x i64> %tmp1, %tmp2 +; CHECK: addq %rax, %rcx store <1 x i64> %tmp3, <1 x i64>* null ret void } + +; MMX intrinsics calls get us MMX instructions. + +define void @ti8a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.b(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti16a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.w(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti32a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.d(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +define void @ti64a(double %a, double %b) nounwind { +entry: + %tmp1 = bitcast double %a to x86_mmx +; CHECK: movdq2q + %tmp2 = bitcast double %b to x86_mmx +; CHECK: movdq2q + %tmp3 = tail call x86_mmx @llvm.x86.mmx.padd.q(x86_mmx %tmp1, x86_mmx %tmp2) + store x86_mmx %tmp3, x86_mmx* null + ret void +} + +declare x86_mmx @llvm.x86.mmx.padd.b(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.w(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.d(x86_mmx, x86_mmx) +declare x86_mmx @llvm.x86.mmx.padd.q(x86_mmx, x86_mmx) |