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-rw-r--r--test/CodeGen/CellSPU/shuffles.ll12
1 files changed, 7 insertions, 5 deletions
diff --git a/test/CodeGen/CellSPU/shuffles.ll b/test/CodeGen/CellSPU/shuffles.ll
index c88a258c26..973586bf6c 100644
--- a/test/CodeGen/CellSPU/shuffles.ll
+++ b/test/CodeGen/CellSPU/shuffles.ll
@@ -1,12 +1,14 @@
; RUN: llc -O1 --march=cellspu < %s | FileCheck %s
+;CHECK: shuffle
define <4 x float> @shuffle(<4 x float> %param1, <4 x float> %param2) {
; CHECK: cwd {{\$.}}, 0($sp)
; CHECK: shufb {{\$., \$4, \$3, \$.}}
%val= shufflevector <4 x float> %param1, <4 x float> %param2, <4 x i32> <i32 4,i32 1,i32 2,i32 3>
ret <4 x float> %val
}
-
+
+;CHECK: splat
define <4 x float> @splat(float %param1) {
; CHECK: lqa
; CHECK: shufb $3
@@ -16,6 +18,7 @@ define <4 x float> @splat(float %param1) {
ret <4 x float> %val
}
+;CHECK: test_insert
define void @test_insert( <2 x float>* %ptr, float %val1, float %val2 ) {
%sl2_17_tmp1 = insertelement <2 x float> zeroinitializer, float %val1, i32 0
;CHECK: lqa $6,
@@ -31,6 +34,7 @@ define void @test_insert( <2 x float>* %ptr, float %val1, float %val2 ) {
ret void
}
+;CHECK: test_insert_1
define <4 x float> @test_insert_1(<4 x float> %vparam, float %eltparam) {
;CHECK: cwd $5, 4($sp)
;CHECK: shufb $3, $4, $3, $5
@@ -39,6 +43,7 @@ define <4 x float> @test_insert_1(<4 x float> %vparam, float %eltparam) {
ret <4 x float> %rv
}
+;CHECK: test_v2i32
define <2 x i32> @test_v2i32(<4 x i32>%vec)
{
;CHECK: rotqbyi $3, $3, 4
@@ -49,17 +54,14 @@ define <2 x i32> @test_v2i32(<4 x i32>%vec)
define <4 x i32> @test_v4i32_rot8(<4 x i32>%vec)
{
-;CHECK: rotqbyi $3, $3, 8
-;CHECK: bi $lr
%rv = shufflevector <4 x i32> %vec, <4 x i32> undef,
<4 x i32> <i32 2,i32 3,i32 0, i32 1>
ret <4 x i32> %rv
}
+;CHECK: test_v4i32_rot4
define <4 x i32> @test_v4i32_rot4(<4 x i32>%vec)
{
-;CHECK: rotqbyi $3, $3, 4
-;CHECK: bi $lr
%rv = shufflevector <4 x i32> %vec, <4 x i32> undef,
<4 x i32> <i32 1,i32 2,i32 3, i32 0>
ret <4 x i32> %rv