diff options
Diffstat (limited to 'test/CodeGen/ARM')
35 files changed, 119 insertions, 116 deletions
diff --git a/test/CodeGen/ARM/2009-07-18-RewriterBug.ll b/test/CodeGen/ARM/2009-07-18-RewriterBug.ll index ee93fde998..2b7ccd8615 100644 --- a/test/CodeGen/ARM/2009-07-18-RewriterBug.ll +++ b/test/CodeGen/ARM/2009-07-18-RewriterBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep fcmpezd | count 13 +; RUN: llc < %s -mtriple=armv6-apple-darwin10 -mattr=+vfp2 | grep vcmpe | count 13 %struct.EDGE_PAIR = type { %struct.edge_rec*, %struct.edge_rec* } %struct.VEC2 = type { double, double, double } diff --git a/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll b/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll index 98cab9a914..3909c6a526 100644 --- a/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll +++ b/test/CodeGen/ARM/2009-09-09-fpcmp-ole.ll @@ -9,7 +9,7 @@ define void @test(double* %x, double* %y) nounwind { br i1 %4, label %bb1, label %bb2 bb1: -;CHECK: fstdhi +;CHECK: vstrhi.64 store double %1, double* %y, align 4 br label %bb2 diff --git a/test/CodeGen/ARM/2009-09-24-spill-align.ll b/test/CodeGen/ARM/2009-09-24-spill-align.ll index 6281775d06..5476d5f796 100644 --- a/test/CodeGen/ARM/2009-09-24-spill-align.ll +++ b/test/CodeGen/ARM/2009-09-24-spill-align.ll @@ -6,7 +6,7 @@ entry: %arg0_poly16x4_t = alloca <4 x i16> ; <<4 x i16>*> [#uses=1] %out_poly16_t = alloca i16 ; <i16*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] -; CHECK: fldd +; CHECK: vldr.64 %0 = load <4 x i16>* %arg0_poly16x4_t, align 8 ; <<4 x i16>> [#uses=1] %1 = extractelement <4 x i16> %0, i32 1 ; <i16> [#uses=1] store i16 %1, i16* %out_poly16_t, align 2 diff --git a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll index c260b973b5..62f3786e20 100644 --- a/test/CodeGen/ARM/2009-11-01-NeonMoves.ll +++ b/test/CodeGen/ARM/2009-11-01-NeonMoves.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=cortex-a8 < %s | grep vmov | count 1 +; RUN: llc -mcpu=cortex-a8 < %s | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" target triple = "armv7-eabi" @@ -11,12 +11,15 @@ entry: %0 = getelementptr inbounds %foo* %quat_addr, i32 0, i32 0 ; <<4 x float>*> [#uses=1] store <4 x float> %quat.0, <4 x float>* %0 %1 = call arm_aapcs_vfpcc <4 x float> @quux(%foo* %quat_addr) nounwind ; <<4 x float>> [#uses=3] +;CHECK: vmov.f32 +;CHECK: vmov.f32 %2 = fmul <4 x float> %1, %1 ; <<4 x float>> [#uses=2] %3 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 0, i32 1> ; <<2 x float>> [#uses=1] %4 = shufflevector <4 x float> %2, <4 x float> undef, <2 x i32> <i32 2, i32 3> ; <<2 x float>> [#uses=1] %5 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %3, <2 x float> %4) nounwind ; <<2 x float>> [#uses=2] %6 = call <2 x float> @llvm.arm.neon.vpadd.v2f32(<2 x float> %5, <2 x float> %5) nounwind ; <<2 x float>> [#uses=2] %7 = shufflevector <2 x float> %6, <2 x float> %6, <4 x i32> <i32 0, i32 1, i32 2, i32 3> ; <<4 x float>> [#uses=2] +;CHECK: vmov %8 = call <4 x float> @llvm.arm.neon.vrsqrte.v4f32(<4 x float> %7) nounwind ; <<4 x float>> [#uses=3] %9 = fmul <4 x float> %8, %8 ; <<4 x float>> [#uses=1] %10 = call <4 x float> @llvm.arm.neon.vrsqrts.v4f32(<4 x float> %9, <4 x float> %7) nounwind ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/arguments_f64_backfill.ll b/test/CodeGen/ARM/arguments_f64_backfill.ll index d8019a07fa..062133e864 100644 --- a/test/CodeGen/ARM/arguments_f64_backfill.ll +++ b/test/CodeGen/ARM/arguments_f64_backfill.ll @@ -1,7 +1,7 @@ ; RUN: llc < %s -mtriple=arm-linux-gnueabi -mattr=+vfp2 -float-abi=hard | FileCheck %s define float @f(float %z, double %a, float %b) { -; CHECK: fcpys s0, s1 +; CHECK: vmov.f32 s0, s1 %tmp = call float @g(float %b) ret float %tmp } diff --git a/test/CodeGen/ARM/compare-call.ll b/test/CodeGen/ARM/compare-call.ll index 5f3ed1d274..fac2bc5e43 100644 --- a/test/CodeGen/ARM/compare-call.ll +++ b/test/CodeGen/ARM/compare-call.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep fcmpes +; RUN: grep vcmpe.f32 define void @test3(float* %glob, i32 %X) { entry: diff --git a/test/CodeGen/ARM/fabss.ll b/test/CodeGen/ARM/fabss.ll index 5690a01d75..46f136ba1f 100644 --- a/test/CodeGen/ARM/fabss.ll +++ b/test/CodeGen/ARM/fabss.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vabs.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vabs.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vabs.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fabss\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vabs.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fadds.ll b/test/CodeGen/ARM/fadds.ll index a01f868d18..1426a2dc88 100644 --- a/test/CodeGen/ARM/fadds.ll +++ b/test/CodeGen/ARM/fadds.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vadd.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vadd.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vadd.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fadds\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vadd.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index bf7c305c89..a6d741087a 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=arm | grep bic | count 2 ; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | \ -; RUN: grep fneg | count 2 +; RUN: grep vneg | count 2 define float @test1(float %x, double %y) { %tmp = fpext float %x to double diff --git a/test/CodeGen/ARM/fdivs.ll b/test/CodeGen/ARM/fdivs.ll index 2af250d121..45803f6d3c 100644 --- a/test/CodeGen/ARM/fdivs.ll +++ b/test/CodeGen/ARM/fdivs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fdivs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vdiv.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vdiv.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vdiv.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vdiv.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vdiv.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fixunsdfdi.ll b/test/CodeGen/ARM/fixunsdfdi.ll index ebf1d84536..6db2385a63 100644 --- a/test/CodeGen/ARM/fixunsdfdi.ll +++ b/test/CodeGen/ARM/fixunsdfdi.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 -; RUN: llc < %s -march=arm -mattr=vfp2 | not grep fstd +; RUN: llc < %s -march=arm -mattr=vfp2 | not grep vstr.64 define hidden i64 @__fixunsdfdi(double %x) nounwind readnone { entry: diff --git a/test/CodeGen/ARM/fmacs.ll b/test/CodeGen/ARM/fmacs.ll index 5c31ea641d..57efa82640 100644 --- a/test/CodeGen/ARM/fmacs.ll +++ b/test/CodeGen/ARM/fmacs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vmla.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vmla.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmacs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vmla.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %acc, float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fmscs.ll b/test/CodeGen/ARM/fmscs.ll index c6e6d40604..31b5c52d38 100644 --- a/test/CodeGen/ARM/fmscs.ll +++ b/test/CodeGen/ARM/fmscs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmscs\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vnmls.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %acc, float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fmuls.ll b/test/CodeGen/ARM/fmuls.ll index cb5dadeb21..735263c9a3 100644 --- a/test/CodeGen/ARM/fmuls.ll +++ b/test/CodeGen/ARM/fmuls.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vmul.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vmul.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vmul.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 1 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fmuls\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vmul.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 1 define float @test(float %a, float %b) { entry: diff --git a/test/CodeGen/ARM/fnegs.ll b/test/CodeGen/ARM/fnegs.ll index 7da443dd93..bc3d42de75 100644 --- a/test/CodeGen/ARM/fnegs.ll +++ b/test/CodeGen/ARM/fnegs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llc < %s -march=arm -mattr=+vfp2 | grep -E {vneg.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 ; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=1 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2 -; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llc < %s -march=arm -mattr=+neon -arm-use-neon-fp=0 | grep -E {vneg.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 ; RUN: llc < %s -march=arm -mcpu=cortex-a8 | grep -E {vneg.f32\\W*d\[0-9\]+,\\W*d\[0-9\]+} | count 2 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {fnegs\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 +; RUN: llc < %s -march=arm -mcpu=cortex-a9 | grep -E {vneg.f32\\W*s\[0-9\]+,\\W*s\[0-9\]+} | count 2 define float @test1(float* %a) { entry: diff --git a/test/CodeGen/ARM/fnmacs.ll b/test/CodeGen/ARM/fnmacs.ll index 8fc13e78bc..724947ea04 100644 --- a/test/CodeGen/ARM/fnmacs.ll +++ b/test/CodeGen/ARM/fnmacs.ll @@ -4,14 +4,14 @@ define float @test(float %acc, float %a, float %b) { entry: -; VFP2: fnmacs -; NEON: fnmacs +; VFP2: vmls.f32 +; NEON: vmls.f32 ; NEONFP-NOT: vmls -; NEONFP-NOT: fcpys +; NEONFP-NOT: vmov.f32 ; NEONFP: vmul.f32 ; NEONFP: vsub.f32 -; NEONFP: fmrs +; NEONFP: vmov %0 = fmul float %a, %b %1 = fsub float %acc, %0 diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll index 3ae437d69d..ad2188218e 100644 --- a/test/CodeGen/ARM/fnmscs.ll +++ b/test/CodeGen/ARM/fnmscs.ll @@ -5,7 +5,7 @@ ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s define float @test1(float %acc, float %a, float %b) nounwind { -; CHECK: fnmscs s2, s1, s0 +; CHECK: vnmla.f32 s2, s1, s0 entry: %0 = fmul float %a, %b %1 = fsub float -0.0, %0 @@ -14,7 +14,7 @@ entry: } define float @test2(float %acc, float %a, float %b) nounwind { -; CHECK: fnmscs s2, s1, s0 +; CHECK: vnmla.f32 s2, s1, s0 entry: %0 = fmul float %a, %b %1 = fmul float -1.0, %0 diff --git a/test/CodeGen/ARM/fnmul.ll b/test/CodeGen/ARM/fnmul.ll index 613b347cdb..6d7bc05ffa 100644 --- a/test/CodeGen/ARM/fnmul.ll +++ b/test/CodeGen/ARM/fnmul.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep fnmuld -; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep fmul +; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 | grep vnmul.f64 +; RUN: llc < %s -march=arm -mattr=+v6,+vfp2 -enable-sign-dependent-rounding-fp-math | grep vmul.f64 define double @t1(double %a, double %b) { diff --git a/test/CodeGen/ARM/fp.ll b/test/CodeGen/ARM/fp.ll index 4e4ef722f9..8fbd45b975 100644 --- a/test/CodeGen/ARM/fp.ll +++ b/test/CodeGen/ARM/fp.ll @@ -2,9 +2,9 @@ define float @f(i32 %a) { ;CHECK: f: -;CHECK: fmsr -;CHECK-NEXT: fsitos -;CHECK-NEXT: fmrs +;CHECK: vmov +;CHECK-NEXT: vcvt.f32.s32 +;CHECK-NEXT: vmov entry: %tmp = sitofp i32 %a to float ; <float> [#uses=1] ret float %tmp @@ -12,9 +12,9 @@ entry: define double @g(i32 %a) { ;CHECK: g: -;CHECK: fmsr -;CHECK-NEXT: fsitod -;CHECK-NEXT: fmrrd +;CHECK: vmov +;CHECK-NEXT: vcvt.f64.s32 +;CHECK-NEXT: vmov entry: %tmp = sitofp i32 %a to double ; <double> [#uses=1] ret double %tmp @@ -22,9 +22,9 @@ entry: define double @uint_to_double(i32 %a) { ;CHECK: uint_to_double: -;CHECK: fmsr -;CHECK-NEXT: fuitod -;CHECK-NEXT: fmrrd +;CHECK: vmov +;CHECK-NEXT: vcvt.f64.u32 +;CHECK-NEXT: vmov entry: %tmp = uitofp i32 %a to double ; <double> [#uses=1] ret double %tmp @@ -32,9 +32,9 @@ entry: define float @uint_to_float(i32 %a) { ;CHECK: uint_to_float: -;CHECK: fmsr -;CHECK-NEXT: fuitos -;CHECK-NEXT: fmrs +;CHECK: vmov +;CHECK-NEXT: vcvt.f32.u32 +;CHECK-NEXT: vmov entry: %tmp = uitofp i32 %a to float ; <float> [#uses=1] ret float %tmp @@ -42,8 +42,8 @@ entry: define double @h(double* %v) { ;CHECK: h: -;CHECK: fldd -;CHECK-NEXT: fmrrd +;CHECK: vldr.64 +;CHECK-NEXT: vmov entry: %tmp = load double* %v ; <double> [#uses=1] ret double %tmp @@ -58,13 +58,13 @@ entry: define double @f2(double %a) { ;CHECK: f2: -;CHECK-NOT: fmdrr +;CHECK-NOT: vmov ret double %a } define void @f3() { ;CHECK: f3: -;CHECK-NOT: fmdrr +;CHECK-NOT: vmov ;CHECK: f4 entry: %tmp = call double @f5( ) ; <double> [#uses=1] diff --git a/test/CodeGen/ARM/fp_convert.ll b/test/CodeGen/ARM/fp_convert.ll index 9ce2ac549b..2adac78cf8 100644 --- a/test/CodeGen/ARM/fp_convert.ll +++ b/test/CodeGen/ARM/fp_convert.ll @@ -6,7 +6,7 @@ define i32 @test1(float %a, float %b) { ; VFP2: test1: -; VFP2: ftosizs s0, s0 +; VFP2: vcvt.s32.f32 s0, s0 ; NEON: test1: ; NEON: vcvt.s32.f32 d0, d0 entry: @@ -17,7 +17,7 @@ entry: define i32 @test2(float %a, float %b) { ; VFP2: test2: -; VFP2: ftouizs s0, s0 +; VFP2: vcvt.u32.f32 s0, s0 ; NEON: test2: ; NEON: vcvt.u32.f32 d0, d0 entry: @@ -28,7 +28,7 @@ entry: define float @test3(i32 %a, i32 %b) { ; VFP2: test3: -; VFP2: fuitos s0, s0 +; VFP2: vcvt.f32.u32 s0, s0 ; NEON: test3: ; NEON: vcvt.f32.u32 d0, d0 entry: @@ -39,7 +39,7 @@ entry: define float @test4(i32 %a, i32 %b) { ; VFP2: test4: -; VFP2: fsitos s0, s0 +; VFP2: vcvt.f32.s32 s0, s0 ; NEON: test4: ; NEON: vcvt.f32.s32 d0, d0 entry: diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll index ebeeb18412..ce6d6b29e9 100644 --- a/test/CodeGen/ARM/fparith.ll +++ b/test/CodeGen/ARM/fparith.ll @@ -2,7 +2,7 @@ define float @f1(float %a, float %b) { ;CHECK: f1: -;CHECK: fadds +;CHECK: vadd.f32 entry: %tmp = fadd float %a, %b ; <float> [#uses=1] ret float %tmp @@ -10,7 +10,7 @@ entry: define double @f2(double %a, double %b) { ;CHECK: f2: -;CHECK: faddd +;CHECK: vadd.f64 entry: %tmp = fadd double %a, %b ; <double> [#uses=1] ret double %tmp @@ -18,7 +18,7 @@ entry: define float @f3(float %a, float %b) { ;CHECK: f3: -;CHECK: fmuls +;CHECK: vmul.f32 entry: %tmp = fmul float %a, %b ; <float> [#uses=1] ret float %tmp @@ -26,7 +26,7 @@ entry: define double @f4(double %a, double %b) { ;CHECK: f4: -;CHECK: fmuld +;CHECK: vmul.f64 entry: %tmp = fmul double %a, %b ; <double> [#uses=1] ret double %tmp @@ -34,7 +34,7 @@ entry: define float @f5(float %a, float %b) { ;CHECK: f5: -;CHECK: fsubs +;CHECK: vsub.f32 entry: %tmp = fsub float %a, %b ; <float> [#uses=1] ret float %tmp @@ -42,7 +42,7 @@ entry: define double @f6(double %a, double %b) { ;CHECK: f6: -;CHECK: fsubd +;CHECK: vsub.f64 entry: %tmp = fsub double %a, %b ; <double> [#uses=1] ret double %tmp @@ -58,7 +58,7 @@ entry: define double @f8(double %a) { ;CHECK: f8: -;CHECK: fnegd +;CHECK: vneg.f64 entry: %tmp1 = fsub double -0.000000e+00, %a ; <double> [#uses=1] ret double %tmp1 @@ -66,7 +66,7 @@ entry: define float @f9(float %a, float %b) { ;CHECK: f9: -;CHECK: fdivs +;CHECK: vdiv.f32 entry: %tmp1 = fdiv float %a, %b ; <float> [#uses=1] ret float %tmp1 @@ -74,7 +74,7 @@ entry: define double @f10(double %a, double %b) { ;CHECK: f10: -;CHECK: fdivd +;CHECK: vdiv.f64 entry: %tmp1 = fdiv double %a, %b ; <double> [#uses=1] ret double %tmp1 @@ -92,7 +92,7 @@ declare float @fabsf(float) define double @f12(double %a) { ;CHECK: f12: -;CHECK: fabsd +;CHECK: vabs.f64 entry: %tmp1 = call double @fabs( double %a ) ; <double> [#uses=1] ret double %tmp1 diff --git a/test/CodeGen/ARM/fpcmp.ll b/test/CodeGen/ARM/fpcmp.ll index 2c9591ca54..260ec49cd8 100644 --- a/test/CodeGen/ARM/fpcmp.ll +++ b/test/CodeGen/ARM/fpcmp.ll @@ -2,7 +2,7 @@ define i32 @f1(float %a) { ;CHECK: f1: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: movmi entry: %tmp = fcmp olt float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -12,7 +12,7 @@ entry: define i32 @f2(float %a) { ;CHECK: f2: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: moveq entry: %tmp = fcmp oeq float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -22,7 +22,7 @@ entry: define i32 @f3(float %a) { ;CHECK: f3: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: movgt entry: %tmp = fcmp ogt float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -32,7 +32,7 @@ entry: define i32 @f4(float %a) { ;CHECK: f4: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: movge entry: %tmp = fcmp oge float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -42,7 +42,7 @@ entry: define i32 @f5(float %a) { ;CHECK: f5: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: movls entry: %tmp = fcmp ole float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -52,7 +52,7 @@ entry: define i32 @f6(float %a) { ;CHECK: f6: -;CHECK: fcmpes +;CHECK: vcmpe.f32 ;CHECK: movne entry: %tmp = fcmp une float %a, 1.000000e+00 ; <i1> [#uses=1] @@ -62,7 +62,7 @@ entry: define i32 @g1(double %a) { ;CHECK: g1: -;CHECK: fcmped +;CHECK: vcmpe.f64 ;CHECK: movmi entry: %tmp = fcmp olt double %a, 1.000000e+00 ; <i1> [#uses=1] diff --git a/test/CodeGen/ARM/fpconv.ll b/test/CodeGen/ARM/fpconv.ll index ee3c338e3b..bf197a46cb 100644 --- a/test/CodeGen/ARM/fpconv.ll +++ b/test/CodeGen/ARM/fpconv.ll @@ -3,7 +3,7 @@ define float @f1(double %x) { ;CHECK-VFP: f1: -;CHECK-VFP: fcvtsd +;CHECK-VFP: vcvt.f32.f64 ;CHECK: f1: ;CHECK: truncdfsf2 entry: @@ -13,7 +13,7 @@ entry: define double @f2(float %x) { ;CHECK-VFP: f2: -;CHECK-VFP: fcvtds +;CHECK-VFP: vcvt.f64.f32 ;CHECK: f2: ;CHECK: extendsfdf2 entry: @@ -23,7 +23,7 @@ entry: define i32 @f3(float %x) { ;CHECK-VFP: f3: -;CHECK-VFP: ftosizs +;CHECK-VFP: vcvt.s32.f32 ;CHECK: f3: ;CHECK: fixsfsi entry: @@ -33,7 +33,7 @@ entry: define i32 @f4(float %x) { ;CHECK-VFP: f4: -;CHECK-VFP: ftouizs +;CHECK-VFP: vcvt.u32.f32 ;CHECK: f4: ;CHECK: fixunssfsi entry: @@ -43,7 +43,7 @@ entry: define i32 @f5(double %x) { ;CHECK-VFP: f5: -;CHECK-VFP: ftosizd +;CHECK-VFP: vcvt.s32.f64 ;CHECK: f5: ;CHECK: fixdfsi entry: @@ -53,7 +53,7 @@ entry: define i32 @f6(double %x) { ;CHECK-VFP: f6: -;CHECK-VFP: ftouizd +;CHECK-VFP: vcvt.u32.f64 ;CHECK: f6: ;CHECK: fixunsdfsi entry: @@ -63,7 +63,7 @@ entry: define float @f7(i32 %a) { ;CHECK-VFP: f7: -;CHECK-VFP: fsitos +;CHECK-VFP: vcvt.f32.s32 ;CHECK: f7: ;CHECK: floatsisf entry: @@ -73,7 +73,7 @@ entry: define double @f8(i32 %a) { ;CHECK-VFP: f8: -;CHECK-VFP: fsitod +;CHECK-VFP: vcvt.f64.s32 ;CHECK: f8: ;CHECK: floatsidf entry: @@ -83,7 +83,7 @@ entry: define float @f9(i32 %a) { ;CHECK-VFP: f9: -;CHECK-VFP: fuitos +;CHECK-VFP: vcvt.f32.u32 ;CHECK: f9: ;CHECK: floatunsisf entry: @@ -93,7 +93,7 @@ entry: define double @f10(i32 %a) { ;CHECK-VFP: f10: -;CHECK-VFP: fuitod +;CHECK-VFP: vcvt.f64.u32 ;CHECK: f10: ;CHECK: floatunsidf entry: diff --git a/test/CodeGen/ARM/fpmem.ll b/test/CodeGen/ARM/fpmem.ll index 0822fbff65..c3cff18c95 100644 --- a/test/CodeGen/ARM/fpmem.ll +++ b/test/CodeGen/ARM/fpmem.ll @@ -8,7 +8,7 @@ define float @f1(float %a) { define float @f2(float* %v, float %u) { ; CHECK: f2: -; CHECK: flds{{.*}}[ +; CHECK: vldr.32{{.*}}[ %tmp = load float* %v ; <float> [#uses=1] %tmp1 = fadd float %tmp, %u ; <float> [#uses=1] ret float %tmp1 @@ -16,7 +16,7 @@ define float @f2(float* %v, float %u) { define void @f3(float %a, float %b, float* %v) { ; CHECK: f3: -; CHECK: fsts{{.*}}[ +; CHECK: vstr.32{{.*}}[ %tmp = fadd float %a, %b ; |