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-rw-r--r--test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll51
-rw-r--r--test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll48
-rw-r--r--test/CodeGen/ARM/Stats/addrmode.ll15
-rw-r--r--test/CodeGen/ARM/Stats/lit.local.cfg8
4 files changed, 122 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll b/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll
new file mode 100644
index 0000000000..a63cdd46e2
--- /dev/null
+++ b/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll
@@ -0,0 +1,51 @@
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 | grep r9
+; RUN: llc < %s -mtriple=arm-apple-darwin -relocation-model=pic \
+; RUN: -mattr=+v6 -arm-reserve-r9 -ifcvt-limit=0 -stats 2>&1 | grep asm-printer
+; | grep 35
+
+define void @test(i32 %tmp56222, i32 %tmp36224, i32 %tmp46223, i32 %i.0196.0.ph, i32 %tmp8, i32* %tmp1011, i32** %tmp1, i32* %d2.1.out, i32* %d3.1.out, i32* %d0.1.out, i32* %d1.1.out) {
+newFuncRoot:
+ br label %bb74
+
+bb78.exitStub: ; preds = %bb74
+ store i32 %d2.1, i32* %d2.1.out
+ store i32 %d3.1, i32* %d3.1.out
+ store i32 %d0.1, i32* %d0.1.out
+ store i32 %d1.1, i32* %d1.1.out
+ ret void
+
+bb74: ; preds = %bb26, %newFuncRoot
+ %fp.1.rec = phi i32 [ 0, %newFuncRoot ], [ %tmp71.rec, %bb26 ] ; <i32> [#uses=3]
+ %fm.1.in = phi i32* [ %tmp71, %bb26 ], [ %tmp1011, %newFuncRoot ] ; <i32*> [#uses=1]
+ %d0.1 = phi i32 [ %tmp44, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d1.1 = phi i32 [ %tmp54, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d2.1 = phi i32 [ %tmp64, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %d3.1 = phi i32 [ %tmp69, %bb26 ], [ 8192, %newFuncRoot ] ; <i32> [#uses=2]
+ %fm.1 = load i32* %fm.1.in ; <i32> [#uses=4]
+ icmp eq i32 %fp.1.rec, %tmp8 ; <i1>:0 [#uses=1]
+ br i1 %0, label %bb78.exitStub, label %bb26
+
+bb26: ; preds = %bb74
+ %tmp28 = getelementptr i32** %tmp1, i32 %fp.1.rec ; <i32**> [#uses=1]
+ %tmp30 = load i32** %tmp28 ; <i32*> [#uses=4]
+ %tmp33 = getelementptr i32* %tmp30, i32 %i.0196.0.ph ; <i32*> [#uses=1]
+ %tmp34 = load i32* %tmp33 ; <i32> [#uses=1]
+ %tmp38 = getelementptr i32* %tmp30, i32 %tmp36224 ; <i32*> [#uses=1]
+ %tmp39 = load i32* %tmp38 ; <i32> [#uses=1]
+ %tmp42 = mul i32 %tmp34, %fm.1 ; <i32> [#uses=1]
+ %tmp44 = add i32 %tmp42, %d0.1 ; <i32> [#uses=1]
+ %tmp48 = getelementptr i32* %tmp30, i32 %tmp46223 ; <i32*> [#uses=1]
+ %tmp49 = load i32* %tmp48 ; <i32> [#uses=1]
+ %tmp52 = mul i32 %tmp39, %fm.1 ; <i32> [#uses=1]
+ %tmp54 = add i32 %tmp52, %d1.1 ; <i32> [#uses=1]
+ %tmp58 = getelementptr i32* %tmp30, i32 %tmp56222 ; <i32*> [#uses=1]
+ %tmp59 = load i32* %tmp58 ; <i32> [#uses=1]
+ %tmp62 = mul i32 %tmp49, %fm.1 ; <i32> [#uses=1]
+ %tmp64 = add i32 %tmp62, %d2.1 ; <i32> [#uses=1]
+ %tmp67 = mul i32 %tmp59, %fm.1 ; <i32> [#uses=1]
+ %tmp69 = add i32 %tmp67, %d3.1 ; <i32> [#uses=1]
+ %tmp71.rec = add i32 %fp.1.rec, 1 ; <i32> [#uses=2]
+ %tmp71 = getelementptr i32* %tmp1011, i32 %tmp71.rec ; <i32*> [#uses=1]
+ br label %bb74
+}
diff --git a/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll b/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll
new file mode 100644
index 0000000000..b21bb006e3
--- /dev/null
+++ b/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll
@@ -0,0 +1,48 @@
+; RUN: llc < %s -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; Radar 10266272
+target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
+target triple = "thumbv7-apple-ios4.0.0"
+; STATS-NOT: machine-sink
+
+define i32 @foo(i32 %h) nounwind readonly ssp {
+entry:
+ br label %for.cond
+
+for.cond: ; preds = %for.body, %entry
+ %cmp = icmp slt i32 0, %h
+ br i1 %cmp, label %for.body, label %if.end299
+
+for.body: ; preds = %for.cond
+ %v.5 = select i1 undef, i32 undef, i32 0
+ %0 = load i8* undef, align 1, !tbaa !0
+ %conv88 = zext i8 %0 to i32
+ %sub89 = sub nsw i32 0, %conv88
+ %v.8 = select i1 undef, i32 undef, i32 %sub89
+ %1 = load i8* null, align 1, !tbaa !0
+ %conv108 = zext i8 %1 to i32
+ %2 = load i8* undef, align 1, !tbaa !0
+ %conv110 = zext i8 %2 to i32
+ %sub111 = sub nsw i32 %conv108, %conv110
+ %cmp112 = icmp slt i32 %sub111, 0
+ %sub115 = sub nsw i32 0, %sub111
+ %v.10 = select i1 %cmp112, i32 %sub115, i32 %sub111
+ %add62 = add i32 0, %v.5
+ %add73 = add i32 %add62, 0
+ %add84 = add i32 %add73, 0
+ %add95 = add i32 %add84, %v.8
+ %add106 = add i32 %add95, 0
+ %add117 = add i32 %add106, %v.10
+ %add128 = add i32 %add117, 0
+ %add139 = add i32 %add128, 0
+ %add150 = add i32 %add139, 0
+ %add161 = add i32 %add150, 0
+ %add172 = add i32 %add161, 0
+ br i1 undef, label %for.cond, label %if.end299
+
+if.end299: ; preds = %for.body, %for.cond
+ %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ]
+ ret i32 %s.10
+}
+
+!0 = metadata !{metadata !"omnipotent char", metadata !1}
+!1 = metadata !{metadata !"Simple C/C++ TBAA", null}
diff --git a/test/CodeGen/ARM/Stats/addrmode.ll b/test/CodeGen/ARM/Stats/addrmode.ll
new file mode 100644
index 0000000000..6da90897b9
--- /dev/null
+++ b/test/CodeGen/ARM/Stats/addrmode.ll
@@ -0,0 +1,15 @@
+; RUN: llc < %s -march=arm -stats 2>&1 | grep asm-printer | grep 4
+
+define i32 @t1(i32 %a) {
+ %b = mul i32 %a, 9
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
+
+define i32 @t2(i32 %a) {
+ %b = mul i32 %a, -7
+ %c = inttoptr i32 %b to i32*
+ %d = load i32* %c
+ ret i32 %d
+}
diff --git a/test/CodeGen/ARM/Stats/lit.local.cfg b/test/CodeGen/ARM/Stats/lit.local.cfg
new file mode 100644
index 0000000000..f6194d2421
--- /dev/null
+++ b/test/CodeGen/ARM/Stats/lit.local.cfg
@@ -0,0 +1,8 @@
+config.suffixes = ['.ll', '.c', '.cpp']
+
+targets = set(config.root.targets_to_build.split())
+if not 'ARM' in targets:
+ config.unsupported = True
+
+if not config.root.enable_assertions:
+ config.unsupported = True