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-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp25
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp42
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp16
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp8
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp2
-rw-r--r--lib/Target/Alpha/AlphaISelLowering.cpp2
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp2
-rw-r--r--lib/Target/IA64/IA64ISelLowering.cpp2
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp2
-rw-r--r--lib/Target/PIC16/PIC16ISelLowering.cpp2
-rw-r--r--lib/Target/PowerPC/PPCISelLowering.cpp2
-rw-r--r--lib/Target/Sparc/SparcISelLowering.cpp4
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp4
13 files changed, 58 insertions, 55 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 3d01bb2fa0..3665ee0128 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -849,7 +849,6 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
case ISD::VALUETYPE:
case ISD::SRCVALUE:
case ISD::MEMOPERAND:
- case ISD::STRING:
case ISD::CONDCODE:
case ISD::ARG_FLAGS:
// Primitives must all be legal.
@@ -1075,11 +1074,11 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
return Result.getValue(Op.ResNo);
}
- case ISD::LOCATION:
- assert(Node->getNumOperands() == 5 && "Invalid LOCATION node!");
+ case ISD::DBG_STOPPOINT:
+ assert(Node->getNumOperands() == 1 && "Invalid DBG_STOPPOINT node!");
Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the input chain.
- switch (TLI.getOperationAction(ISD::LOCATION, MVT::Other)) {
+ switch (TLI.getOperationAction(ISD::DBG_STOPPOINT, MVT::Other)) {
case TargetLowering::Promote:
default: assert(0 && "This action is not supported yet!");
case TargetLowering::Expand: {
@@ -1087,26 +1086,22 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
bool useDEBUG_LOC = TLI.isOperationLegal(ISD::DEBUG_LOC, MVT::Other);
bool useLABEL = TLI.isOperationLegal(ISD::LABEL, MVT::Other);
+ const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
if (MMI && (useDEBUG_LOC || useLABEL)) {
- const std::string &FName =
- cast<StringSDNode>(Node->getOperand(3))->getValue();
- const std::string &DirName =
- cast<StringSDNode>(Node->getOperand(4))->getValue();
- unsigned SrcFile = MMI->RecordSource(DirName, FName);
+ const CompileUnitDesc *CompileUnit = DSP->getCompileUnit();
+ unsigned SrcFile = MMI->RecordSource(CompileUnit);
SmallVector<SDOperand, 8> Ops;
Ops.push_back(Tmp1); // chain
- SDOperand LineOp = Node->getOperand(1);
- SDOperand ColOp = Node->getOperand(2);
+ unsigned Line = DSP->getLine();
+ unsigned Col = DSP->getColumn();
if (useDEBUG_LOC) {
- Ops.push_back(LineOp); // line #
- Ops.push_back(ColOp); // col #
+ Ops.push_back(DAG.getConstant(Line, MVT::i32)); // line #
+ Ops.push_back(DAG.getConstant(Col, MVT::i32)); // col #
Ops.push_back(DAG.getConstant(SrcFile, MVT::i32)); // source file id
Result = DAG.getNode(ISD::DEBUG_LOC, MVT::Other, &Ops[0], Ops.size());
} else {
- unsigned Line = cast<ConstantSDNode>(LineOp)->getValue();
- unsigned Col = cast<ConstantSDNode>(ColOp)->getValue();
unsigned ID = MMI->RecordSourceLine(Line, Col, SrcFile);
Ops.push_back(DAG.getConstant(ID, MVT::i32));
Ops.push_back(DAG.getConstant(0, MVT::i32)); // a debug label
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 6456fa30e3..c364e1f737 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -382,6 +382,13 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
case ISD::Register:
ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
break;
+ case ISD::DBG_STOPPOINT: {
+ const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(N);
+ ID.AddInteger(DSP->getLine());
+ ID.AddInteger(DSP->getColumn());
+ ID.AddPointer(DSP->getCompileUnit());
+ break;
+ }
case ISD::SRCVALUE:
ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
break;
@@ -575,9 +582,6 @@ void SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
bool Erased = false;
switch (N->getOpcode()) {
case ISD::HANDLENODE: return; // noop.
- case ISD::STRING:
- Erased = StringNodes.erase(cast<StringSDNode>(N)->getValue());
- break;
case ISD::CONDCODE:
assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
"Cond code doesn't exist!");
@@ -738,15 +742,6 @@ SDOperand SelectionDAG::getZeroExtendInReg(SDOperand Op, MVT VT) {
getConstant(Imm, Op.getValueType()));
}
-SDOperand SelectionDAG::getString(const std::string &Val) {
- StringSDNode *&N = StringNodes[Val];
- if (!N) {
- N = new StringSDNode(Val);
- AllNodes.push_back(N);
- }
- return SDOperand(N, 0);
-}
-
SDOperand SelectionDAG::getConstant(uint64_t Val, MVT VT, bool isT) {
MVT EltVT = VT.isVector() ? VT.getVectorElementType() : VT;
return getConstant(APInt(EltVT.getSizeInBits(), Val), VT, isT);
@@ -1005,6 +1000,24 @@ SDOperand SelectionDAG::getRegister(unsigned RegNo, MVT VT) {
return SDOperand(N, 0);
}
+SDOperand SelectionDAG::getDbgStopPoint(SDOperand Root,
+ unsigned Line, unsigned Col,
+ const CompileUnitDesc *CU) {
+ FoldingSetNodeID ID;
+ SDOperand Ops[] = { Root };
+ AddNodeIDNode(ID, ISD::DBG_STOPPOINT, getVTList(MVT::Other), &Ops[0], 1);
+ ID.AddInteger(Line);
+ ID.AddInteger(Col);
+ ID.AddPointer(CU);
+ void *IP = 0;
+ if (SDNode *E = CSEMap.FindNodeOrInsertPos(ID, IP))
+ return SDOperand(E, 0);
+ SDNode *N = new DbgStopPointSDNode(Root, Line, Col, CU);
+ CSEMap.InsertNode(N, IP);
+ AllNodes.push_back(N);
+ return SDOperand(N, 0);
+}
+
SDOperand SelectionDAG::getSrcValue(const Value *V) {
assert((!V || isa<PointerType>(V->getType())) &&
"SrcValue is not a pointer?");
@@ -4178,7 +4191,6 @@ void UnarySDNode::ANCHOR() {}
void BinarySDNode::ANCHOR() {}
void TernarySDNode::ANCHOR() {}
void HandleSDNode::ANCHOR() {}
-void StringSDNode::ANCHOR() {}
void ConstantSDNode::ANCHOR() {}
void ConstantFPSDNode::ANCHOR() {}
void GlobalAddressSDNode::ANCHOR() {}
@@ -4189,6 +4201,7 @@ void BasicBlockSDNode::ANCHOR() {}
void SrcValueSDNode::ANCHOR() {}
void MemOperandSDNode::ANCHOR() {}
void RegisterSDNode::ANCHOR() {}
+void DbgStopPointSDNode::ANCHOR() {}
void ExternalSymbolSDNode::ANCHOR() {}
void CondCodeSDNode::ANCHOR() {}
void ARG_FLAGSSDNode::ANCHOR() {}
@@ -4463,7 +4476,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::AssertSext: return "AssertSext";
case ISD::AssertZext: return "AssertZext";
- case ISD::STRING: return "String";
case ISD::BasicBlock: return "BasicBlock";
case ISD::ARG_FLAGS: return "ArgFlags";
case ISD::VALUETYPE: return "ValueType";
@@ -4624,7 +4636,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::CTLZ: return "ctlz";
// Debug info
- case ISD::LOCATION: return "location";
+ case ISD::DBG_STOPPOINT: return "dbg_stoppoint";
case ISD::DEBUG_LOC: return "debug_loc";
// Trampolines
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 8cfc334c02..273f046bf7 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -3164,20 +3164,12 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
MachineModuleInfo *MMI = DAG.getMachineModuleInfo();
DbgStopPointInst &SPI = cast<DbgStopPointInst>(I);
if (MMI && SPI.getContext() && MMI->Verify(SPI.getContext())) {
- SDOperand Ops[5];
-
- Ops[0] = getRoot();
- Ops[1] = getValue(SPI.getLineValue());
- Ops[2] = getValue(SPI.getColumnValue());
-
DebugInfoDesc *DD = MMI->getDescFor(SPI.getContext());
assert(DD && "Not a debug information descriptor");
- CompileUnitDesc *CompileUnit = cast<CompileUnitDesc>(DD);
-
- Ops[3] = DAG.getString(CompileUnit->getFileName());
- Ops[4] = DAG.getString(CompileUnit->getDirectory());
-
- DAG.setRoot(DAG.getNode(ISD::LOCATION, MVT::Other, Ops, 5));
+ DAG.setRoot(DAG.getDbgStopPoint(getRoot(),
+ SPI.getLine(),
+ SPI.getColumn(),
+ cast<CompileUnitDesc>(DD)));
}
return 0;
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
index 07f3221777..5c51cf7810 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
@@ -18,6 +18,7 @@
#include "llvm/CodeGen/ScheduleDAG.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineDebugInfoDesc.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/GraphWriter.h"
@@ -138,6 +139,11 @@ std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
} else {
Op += " #" + utostr(R->getReg());
}
+ } else if (const DbgStopPointSDNode *D = dyn_cast<DbgStopPointSDNode>(Node)) {
+ Op += ": " + D->getCompileUnit()->getFileName();
+ Op += ":" + utostr(D->getLine());
+ if (D->getColumn() != 0)
+ Op += ":" + utostr(D->getColumn());
} else if (const ExternalSymbolSDNode *ES =
dyn_cast<ExternalSymbolSDNode>(Node)) {
Op += "'" + std::string(ES->getSymbol()) + "'";
@@ -155,8 +161,6 @@ std::string DOTGraphTraits<SelectionDAG*>::getNodeLabel(const SDNode *Node,
Op = Op + " AF=" + N->getArgFlags().getArgFlagsString();
} else if (const VTSDNode *N = dyn_cast<VTSDNode>(Node)) {
Op = Op + " VT=" + N->getVT().getMVTString();
- } else if (const StringSDNode *N = dyn_cast<StringSDNode>(Node)) {
- Op = Op + "\"" + N->getValue() + "\"";
} else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(Node)) {
bool doExt = true;
switch (LD->getExtensionType()) {
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 2c11919b48..47abefeadc 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -188,7 +188,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM)
setOperationAction(ISD::UDIVREM, MVT::i32, Expand);
// Support label based line numbers.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::RET, MVT::Other, Custom);
diff --git a/lib/Target/Alpha/AlphaISelLowering.cpp b/lib/Target/Alpha/AlphaISelLowering.cpp
index ad50816d9c..3cf306a127 100644
--- a/lib/Target/Alpha/AlphaISelLowering.cpp
+++ b/lib/Target/Alpha/AlphaISelLowering.cpp
@@ -104,7 +104,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM)
setOperationAction(ISD::BIT_CONVERT, MVT::f32, Promote);
// We don't have line number support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp
index e99a8bdae7..1aae24ff1f 100644
--- a/lib/Target/CellSPU/SPUISelLowering.cpp
+++ b/lib/Target/CellSPU/SPUISelLowering.cpp
@@ -290,7 +290,7 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM)
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
// Support label based line numbers.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
// We want to legalize GlobalAddress and ConstantPool nodes into the
diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 710cd0c66d..69f0cb1bc7 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -87,7 +87,7 @@ IA64TargetLowering::IA64TargetLowering(TargetMachine &TM)
setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
// We don't have line number support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index 3dfd33401e..a2fef465fa 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -95,7 +95,7 @@ MipsTargetLowering(MipsTargetMachine &TM): TargetLowering(TM)
setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
// We don't have line number support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index fa1698f37e..dc44e090e6 100644
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -133,7 +133,7 @@ PIC16TargetLowering(PIC16TargetMachine &TM): TargetLowering(TM)
setOperationAction(ISD::SRL_PARTS, MVT::i32, Expand);
// We don't have line number support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index 918db9d5d2..482ce63972 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -164,7 +164,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1, Expand);
// Support label based line numbers.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand);
diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index fd60296b1f..6b0593b869 100644
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -595,7 +595,7 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand);
// We don't have line number support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
@@ -615,7 +615,7 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i32 , Custom);
// No debug info support yet.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::LABEL, MVT::Other, Expand);
setOperationAction(ISD::DECLARE, MVT::Other, Expand);
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 7173df6969..794e584987 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -298,8 +298,8 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::ATOMIC_CMP_SWAP , MVT::i64, Custom);
setOperationAction(ISD::ATOMIC_LOAD_SUB , MVT::i32, Expand);
- // Use the default ISD::LOCATION, ISD::DECLARE expansion.
- setOperationAction(ISD::LOCATION, MVT::Other, Expand);
+ // Use the default ISD::DBG_STOPPOINT, ISD::DECLARE expansion.
+ setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
// FIXME - use subtarget debug flags
if (!Subtarget->isTargetDarwin() &&
!Subtarget->isTargetELF() &&
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-04 17:01:07 +0000