diff options
Diffstat (limited to 'lib')
-rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/SchedGraph.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/Makefile | 2 | ||||
-rw-r--r-- | lib/CodeGen/RegAlloc/RegClass.h | 7 | ||||
-rw-r--r-- | lib/CodeGen/TargetMachine/Makefile | 5 | ||||
-rw-r--r-- | lib/ExecutionEngine/Interpreter/Execution.cpp | 2 | ||||
-rw-r--r-- | lib/Target/Makefile | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/InstrScheduling.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/SchedGraph.cpp | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/RegAlloc/RegClass.h | 7 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9Internals.h | 2 | ||||
-rw-r--r-- | lib/Target/SparcV9/SparcV9RegInfo.h | 6 | ||||
-rw-r--r-- | lib/Target/TargetData.cpp (renamed from lib/CodeGen/TargetMachine/TargetData.cpp) | 2 | ||||
-rw-r--r-- | lib/Target/TargetMachine.cpp (renamed from lib/CodeGen/TargetMachine/TargetMachine.cpp) | 28 |
14 files changed, 19 insertions, 52 deletions
diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 2358687065..0987572ac3 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -12,7 +12,7 @@ #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/SchedPriorities.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Support/CommandLine.h" #include "llvm/Instruction.h" diff --git a/lib/CodeGen/InstrSched/SchedGraph.cpp b/lib/CodeGen/InstrSched/SchedGraph.cpp index 05109cb852..3c819f6bc7 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.cpp +++ b/lib/CodeGen/InstrSched/SchedGraph.cpp @@ -18,7 +18,7 @@ #include "llvm/Method.h" #include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/Support/StringExtras.h" #include <algorithm> diff --git a/lib/CodeGen/Makefile b/lib/CodeGen/Makefile index 1c0e390088..b0fba9d656 100644 --- a/lib/CodeGen/Makefile +++ b/lib/CodeGen/Makefile @@ -1,4 +1,4 @@ LEVEL = ../.. -DIRS = TargetMachine InstrSelection InstrSched +DIRS = InstrSelection InstrSched include $(LEVEL)/Makefile.common diff --git a/lib/CodeGen/RegAlloc/RegClass.h b/lib/CodeGen/RegAlloc/RegClass.h index 1d08502445..efe174617c 100644 --- a/lib/CodeGen/RegAlloc/RegClass.h +++ b/lib/CodeGen/RegAlloc/RegClass.h @@ -16,19 +16,14 @@ */ - - #ifndef REG_CLASS_H #define REG_CLASS_H #include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/InterferenceGraph.h" -#include "llvm/CodeGen/TargetMachine.h" - - +#include "llvm/Target/Machine.h" #include <stack> - typedef vector<unsigned int> ReservedColorListType; diff --git a/lib/CodeGen/TargetMachine/Makefile b/lib/CodeGen/TargetMachine/Makefile deleted file mode 100644 index eefef8907a..0000000000 --- a/lib/CodeGen/TargetMachine/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -LEVEL = ../../.. - -LIBRARYNAME = target - -include $(LEVEL)/Makefile.common diff --git a/lib/ExecutionEngine/Interpreter/Execution.cpp b/lib/ExecutionEngine/Interpreter/Execution.cpp index 0b017ad574..ff91410664 100644 --- a/lib/ExecutionEngine/Interpreter/Execution.cpp +++ b/lib/ExecutionEngine/Interpreter/Execution.cpp @@ -13,7 +13,7 @@ #include "llvm/ConstPoolVals.h" #include "llvm/Assembly/Writer.h" #include "llvm/Support/DataTypes.h" -#include "llvm/CodeGen/TargetData.h" +#include "llvm/Target/Data.h" static unsigned getOperandSlot(Value *V) { SlotNumber *SN = (SlotNumber*)V->getAnnotation(SlotNumberAID); diff --git a/lib/Target/Makefile b/lib/Target/Makefile index ebcd23a242..7fd02c6672 100644 --- a/lib/Target/Makefile +++ b/lib/Target/Makefile @@ -1,5 +1,5 @@ LEVEL = ../.. DIRS = Sparc +LIBRARYNAME = target include $(LEVEL)/Makefile.common - diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index 2358687065..0987572ac3 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -12,7 +12,7 @@ #include "llvm/CodeGen/InstrScheduling.h" #include "llvm/CodeGen/SchedPriorities.h" #include "llvm/Analysis/LiveVar/BBLiveVar.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/CodeGen/MachineInstr.h" #include "llvm/Support/CommandLine.h" #include "llvm/Instruction.h" diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp index 05109cb852..3c819f6bc7 100644 --- a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp +++ b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp @@ -18,7 +18,7 @@ #include "llvm/Method.h" #include "llvm/CodeGen/SchedGraph.h" #include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/Support/StringExtras.h" #include <algorithm> diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.h b/lib/Target/SparcV9/RegAlloc/RegClass.h index 1d08502445..efe174617c 100644 --- a/lib/Target/SparcV9/RegAlloc/RegClass.h +++ b/lib/Target/SparcV9/RegAlloc/RegClass.h @@ -16,19 +16,14 @@ */ - - #ifndef REG_CLASS_H #define REG_CLASS_H #include "llvm/CodeGen/IGNode.h" #include "llvm/CodeGen/InterferenceGraph.h" -#include "llvm/CodeGen/TargetMachine.h" - - +#include "llvm/Target/Machine.h" #include <stack> - typedef vector<unsigned int> ReservedColorListType; diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h index 606966db73..f9a344b37a 100644 --- a/lib/Target/SparcV9/SparcV9Internals.h +++ b/lib/Target/SparcV9/SparcV9Internals.h @@ -8,7 +8,7 @@ #ifndef SPARC_INTERNALS_H #define SPARC_INTERNALS_H -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "SparcRegInfo.h" #include <sys/types.h> diff --git a/lib/Target/SparcV9/SparcV9RegInfo.h b/lib/Target/SparcV9/SparcV9RegInfo.h index 41a6d00a08..3ebef550f0 100644 --- a/lib/Target/SparcV9/SparcV9RegInfo.h +++ b/lib/Target/SparcV9/SparcV9RegInfo.h @@ -4,19 +4,17 @@ Purpose: Contains the description of integer register class of Sparc */ - #ifndef SPARC_INT_REG_CLASS_H #define SPARC_INT_REG_CLASS_H -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" //----------------------------------------------------------------------------- // Integer Register Class //----------------------------------------------------------------------------- - // Int register names in same order as enum in class SparcIntRegOrder - +// static string const IntRegNames[] = { "g1", "g2", "g3", "g4", "g5", "g6", "g7", "o0", "o1", "o2", "o3", "o4", "o5", "o7", diff --git a/lib/CodeGen/TargetMachine/TargetData.cpp b/lib/Target/TargetData.cpp index fd9dd26d28..2e2ffd84cd 100644 --- a/lib/CodeGen/TargetMachine/TargetData.cpp +++ b/lib/Target/TargetData.cpp @@ -10,7 +10,7 @@ // //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/TargetData.h" +#include "llvm/Target/Data.h" #include "llvm/DerivedTypes.h" #include "llvm/ConstPoolVals.h" diff --git a/lib/CodeGen/TargetMachine/TargetMachine.cpp b/lib/Target/TargetMachine.cpp index 0a9a739071..a9e376e10a 100644 --- a/lib/CodeGen/TargetMachine/TargetMachine.cpp +++ b/lib/Target/TargetMachine.cpp @@ -1,23 +1,12 @@ -// $Id$ -//*************************************************************************** -// File: -// TargetMachine.cpp -// -// Purpose: -// -// History: -// 7/12/01 - Vikram Adve - Created -//**************************************************************************/ - +//===-- TargetMachine.cpp - General Target Information ---------------------==// +// +// This file describes the general parts of a Target machine. +// +//===----------------------------------------------------------------------===// -//*************************** User Include Files ***************************/ - -#include "llvm/CodeGen/TargetMachine.h" +#include "llvm/Target/Machine.h" #include "llvm/DerivedTypes.h" -//************************ Exported Constants ******************************/ - - // External object describing the machine instructions // Initialized only when the TargetMachine class is created // and reset when that class is destroyed. @@ -26,17 +15,12 @@ const MachineInstrDescriptor* TargetInstrDescriptors = NULL; resourceId_t MachineResource::nextId = 0; -//************************* Forward Declarations **************************/ - static cycles_t ComputeMinGap (const InstrRUsage& fromRU, const InstrRUsage& toRU); static bool RUConflict (const vector<resourceId_t>& fromRVec, const vector<resourceId_t>& fromRVec); - -//************************ Class Implementations **************************/ - //--------------------------------------------------------------------------- // class TargetMachine // |