diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMInstrFormats.td | 5 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrNEON.td | 23 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp | 4 |
3 files changed, 31 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td index b9868ccf6a..c7ef149e75 100644 --- a/lib/Target/ARM/ARMInstrFormats.td +++ b/lib/Target/ARM/ARMInstrFormats.td @@ -1035,6 +1035,11 @@ class NI<dag oops, dag iops, string asm, list<dag> pattern> : NeonI<oops, iops, AddrModeNone, IndexModeNone, asm, "", pattern> { } +class NLdSt<dag oops, dag iops, string asm, list<dag> pattern> + : NeonI<oops, iops, AddrMode6, IndexModeNone, asm, "", pattern> { + let Inst{31-24} = 0b11110100; +} + class NDataI<dag oops, dag iops, string asm, string cstr, list<dag> pattern> : NeonI<oops, iops, AddrModeNone, IndexModeNone, asm, cstr, pattern> { let Inst{31-25} = 0b1111001; diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index a62597bad8..e8d3f58630 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -111,6 +111,29 @@ def VSTRQ : NI<(outs), (ins QPR:$src, GPR:$addr), [(store (v2f64 QPR:$src), GPR:$addr)]>; +// VLD1 : Vector Load (multiple single elements) +class VLD1D<string OpcodeStr, ValueType Ty, Intrinsic IntOp> + : NLdSt<(outs DPR:$dst), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t${dst:dregsingle}, $addr"), + [(set DPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; +class VLD1Q<string OpcodeStr, ValueType Ty, Intrinsic IntOp> + : NLdSt<(outs QPR:$dst), (ins addrmode6:$addr), + !strconcat(OpcodeStr, "\t${dst:dregpair}, $addr"), + [(set QPR:$dst, (Ty (IntOp addrmode6:$addr, 1)))]>; + +def VLD1d8 : VLD1D<"vld1.8", v8i8, int_arm_neon_vldi>; +def VLD1d16 : VLD1D<"vld1.16", v4i16, int_arm_neon_vldi>; +def VLD1d32 : VLD1D<"vld1.32", v2i32, int_arm_neon_vldi>; +def VLD1df : VLD1D<"vld1.32", v2f32, int_arm_neon_vldf>; +def VLD1d64 : VLD1D<"vld1.64", v1i64, int_arm_neon_vldi>; + +def VLD1q8 : VLD1Q<"vld1.8", v16i8, int_arm_neon_vldi>; +def VLD1q16 : VLD1Q<"vld1.16", v8i16, int_arm_neon_vldi>; +def VLD1q32 : VLD1Q<"vld1.32", v4i32, int_arm_neon_vldi>; +def VLD1qf : VLD1Q<"vld1.32", v4f32, int_arm_neon_vldf>; +def VLD1q64 : VLD1Q<"vld1.64", v2i64, int_arm_neon_vldi>; + + //===----------------------------------------------------------------------===// // NEON pattern fragments //===----------------------------------------------------------------------===// diff --git a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp index 434a19abef..532e3cc4d6 100644 --- a/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp +++ b/lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp @@ -298,8 +298,10 @@ void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum, unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1 O << '{' - << TRI->getAsmName(DRegLo) << "-" << TRI->getAsmName(DRegHi) + << TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi) << '}'; + } else if (Modifier && strcmp(Modifier, "dregsingle") == 0) { + O << '{' << TRI->getAsmName(Reg) << '}'; } else { O << TRI->getAsmName(Reg); } |