diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMTargetMachine.cpp | 2 |
3 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index f4cba4b336..0fb7e25550 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -146,7 +146,7 @@ ARMTargetLowering::ARMTargetLowering(TargetMachine &TM) setOperationAction(ISD::LOCATION, MVT::Other, Expand); setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand); // FIXME - use subtarget debug flags - if (Subtarget->isDarwin()) + if (Subtarget->isTargetDarwin()) setOperationAction(ISD::DEBUG_LABEL, MVT::Other, Expand); setOperationAction(ISD::RET, MVT::Other, Custom); @@ -470,7 +470,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { isDirect = true; bool isExt = (GV->isExternal() || GV->hasWeakLinkage() || GV->hasLinkOnceLinkage()); - bool isStub = (isExt && Subtarget->isDarwin()) && + bool isStub = (isExt && Subtarget->isTargetDarwin()) && getTargetMachine().getRelocationModel() != Reloc::Static; isARMFunc = !Subtarget->isThumb() || isStub; // Wrap it since tBX takes a register source operand. @@ -479,7 +479,7 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { Callee = DAG.getTargetExternalSymbol(S->getSymbol(), getPointerTy()); isDirect = true; - bool isStub = Subtarget->isDarwin() && + bool isStub = Subtarget->isTargetDarwin() && getTargetMachine().getRelocationModel() != Reloc::Static; isARMFunc = !Subtarget->isThumb() || isStub; // Wrap it since tBX takes a register source operand. @@ -641,7 +641,7 @@ SDOperand ARMTargetLowering::LowerGlobalAddress(SDOperand Op, MVT::ValueType PtrVT = getPointerTy(); GlobalValue *GV = cast<GlobalAddressSDNode>(Op)->getGlobal(); Reloc::Model RelocM = getTargetMachine().getRelocationModel(); - bool IsIndirect = Subtarget->isDarwin() && GVIsIndirectSymbol(GV); + bool IsIndirect = Subtarget->isTargetDarwin() && GVIsIndirectSymbol(GV); SDOperand CPAddr; if (RelocM == Reloc::Static) CPAddr = DAG.getTargetConstantPool(GV, PtrVT, 2); diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 5ae482babc..6419d10dab 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -256,7 +256,7 @@ const unsigned* ARMRegisterInfo::getCalleeSavedRegs() const { ARM::D11, ARM::D10, ARM::D9, ARM::D8, 0 }; - return STI.isDarwin() ? DarwinCalleeSavedRegs : CalleeSavedRegs; + return STI.isTargetDarwin() ? DarwinCalleeSavedRegs : CalleeSavedRegs; } const TargetRegisterClass* const * @@ -807,7 +807,7 @@ static void movePastCSLoadStoreOps(MachineBasicBlock &MBB, case ARM::R9: case ARM::R10: case ARM::R11: - Category = STI.isDarwin() ? 2 : 1; + Category = STI.isTargetDarwin() ? 2 : 1; break; case ARM::D8: case ARM::D9: @@ -870,7 +870,7 @@ void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const { case ARM::R11: if (Reg == FramePtr) FramePtrSpillFI = FI; - if (STI.isDarwin()) { + if (STI.isTargetDarwin()) { AFI->addGPRCalleeSavedArea2Frame(FI); GPRCS2Size += 4; } else { diff --git a/lib/Target/ARM/ARMTargetMachine.cpp b/lib/Target/ARM/ARMTargetMachine.cpp index 195689e059..7cb610a04f 100644 --- a/lib/Target/ARM/ARMTargetMachine.cpp +++ b/lib/Target/ARM/ARMTargetMachine.cpp @@ -35,7 +35,7 @@ namespace { ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS) : Subtarget(M, FS), DataLayout("e-p:32:32-d:32"), InstrInfo(Subtarget), FrameInfo(Subtarget) { - if (Subtarget.isDarwin()) + if (Subtarget.isTargetDarwin()) NoFramePointerElim = true; } |