5 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/X86/PeepholeOptimizer.cpp b/lib/Target/X86/PeepholeOptimizer.cpp
index 0c159e1698..42c985d2d6 100644
--- a/lib/Target/X86/PeepholeOptimizer.cpp
+++ b/lib/Target/X86/PeepholeOptimizer.cpp
@@ -164,7 +164,7 @@ namespace {
     // getDefinition - Return the machine instruction that defines the specified
     // SSA virtual register.
     MachineInstr *getDefinition(unsigned Reg) {
-      assert(Reg >= MRegisterInfo::FirstVirtualRegister &&
+      assert(MRegisterInfo::isVirtualRegister(Reg) &&
              "use-def chains only exist for SSA registers!");
       assert(Reg - MRegisterInfo::FirstVirtualRegister < DefiningInst.size() &&
              "Unknown register number!");
diff --git a/lib/Target/X86/Printer.cpp b/lib/Target/X86/Printer.cpp
index f591612aea..31ac00f729 100644
--- a/lib/Target/X86/Printer.cpp
+++ b/lib/Target/X86/Printer.cpp
@@ -399,7 +399,7 @@ void Printer::printOp(const MachineOperand &MO,
     }
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
-    if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
+    if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       // Bug Workaround: See note in Printer::doInitialization about %.
       O << "%" << RI.get(MO.getReg()).Name;
     else
diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
index f591612aea..31ac00f729 100644
--- a/lib/Target/X86/X86AsmPrinter.cpp
+++ b/lib/Target/X86/X86AsmPrinter.cpp
@@ -399,7 +399,7 @@ void Printer::printOp(const MachineOperand &MO,
     }
     // FALLTHROUGH
   case MachineOperand::MO_MachineRegister:
-    if (MO.getReg() < MRegisterInfo::FirstVirtualRegister)
+    if (MRegisterInfo::isPhysicalRegister(MO.getReg()))
       // Bug Workaround: See note in Printer::doInitialization about %.
       O << "%" << RI.get(MO.getReg()).Name;
     else
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 4a66230c5f..a28d0ee86d 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -329,7 +329,7 @@ static unsigned getX86RegNum(unsigned RegNo) {
   case X86::ST4: case X86::ST5: case X86::ST6: case X86::ST7:
     return RegNo-X86::ST0;
   default:
-    assert(RegNo >= MRegisterInfo::FirstVirtualRegister &&
+    assert(MRegisterInfo::isVirtualRegister(RegNo) &&
            "Unknown physical register!");
     assert(0 && "Register allocator hasn't allocated reg correctly yet!");
     return 0;
diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp
index 0c159e1698..42c985d2d6 100644
--- a/lib/Target/X86/X86PeepholeOpt.cpp
+++ b/lib/Target/X86/X86PeepholeOpt.cpp
@@ -164,7 +164,7 @@ namespace {
     // getDefinition - Return the machine instruction that defines the specified
     // SSA virtual register.
     MachineInstr *getDefinition(unsigned Reg) {
-      assert(Reg >= MRegisterInfo::FirstVirtualRegister &&
+      assert(MRegisterInfo::isVirtualRegister(Reg) &&
              "use-def chains only exist for SSA registers!");
       assert(Reg - MRegisterInfo::FirstVirtualRegister < DefiningInst.size() &&
              "Unknown register number!");