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-rw-r--r--lib/Target/ARM/ARM.h3
-rw-r--r--lib/Target/ARM/ARM.td3
-rw-r--r--lib/Target/ARM/ARMAddressingModes.h4
-rw-r--r--lib/Target/ARM/ARMAsmPrinter.cpp3
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp4
-rw-r--r--lib/Target/ARM/ARMConstantIslandPass.cpp4
-rw-r--r--lib/Target/ARM/ARMConstantPoolValue.cpp4
-rw-r--r--lib/Target/ARM/ARMConstantPoolValue.h4
-rw-r--r--lib/Target/ARM/ARMFrameInfo.h3
-rw-r--r--lib/Target/ARM/ARMISelDAGToDAG.cpp4
-rw-r--r--lib/Target/ARM/ARMISelLowering.cpp4
-rw-r--r--lib/Target/ARM/ARMISelLowering.h4
-rw-r--r--lib/Target/ARM/ARMInstrInfo.cpp3
-rw-r--r--lib/Target/ARM/ARMInstrInfo.h3
-rw-r--r--lib/Target/ARM/ARMInstrInfo.td3
-rw-r--r--lib/Target/ARM/ARMInstrThumb.td4
-rw-r--r--lib/Target/ARM/ARMInstrVFP.td4
-rw-r--r--lib/Target/ARM/ARMJITInfo.cpp4
-rw-r--r--lib/Target/ARM/ARMJITInfo.h4
-rw-r--r--lib/Target/ARM/ARMLoadStoreOptimizer.cpp4
-rw-r--r--lib/Target/ARM/ARMMachineFunctionInfo.h4
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.cpp3
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.h3
-rw-r--r--lib/Target/ARM/ARMRegisterInfo.td3
-rw-r--r--lib/Target/ARM/ARMRelocations.h4
-rw-r--r--lib/Target/ARM/ARMSubtarget.cpp4
-rw-r--r--lib/Target/ARM/ARMSubtarget.h4
-rw-r--r--lib/Target/ARM/ARMTargetAsmInfo.cpp5
-rw-r--r--lib/Target/ARM/ARMTargetAsmInfo.h4
-rw-r--r--lib/Target/ARM/ARMTargetMachine.cpp3
-rw-r--r--lib/Target/ARM/ARMTargetMachine.h3
-rw-r--r--lib/Target/Alpha/Alpha.h4
-rw-r--r--lib/Target/Alpha/Alpha.td4
-rw-r--r--lib/Target/Alpha/AlphaAsmPrinter.cpp4
-rw-r--r--lib/Target/Alpha/AlphaBranchSelector.cpp4
-rw-r--r--lib/Target/Alpha/AlphaCodeEmitter.cpp4
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp4
-rw-r--r--lib/Target/Alpha/AlphaISelLowering.cpp4
-rw-r--r--lib/Target/Alpha/AlphaISelLowering.h4
-rw-r--r--lib/Target/Alpha/AlphaInstrFormats.td4
-rw-r--r--lib/Target/Alpha/AlphaInstrInfo.cpp4
-rw-r--r--lib/Target/Alpha/AlphaInstrInfo.h4
-rw-r--r--lib/Target/Alpha/AlphaInstrInfo.td4
-rw-r--r--lib/Target/Alpha/AlphaJITInfo.cpp4
-rw-r--r--lib/Target/Alpha/AlphaJITInfo.h4
-rw-r--r--lib/Target/Alpha/AlphaLLRP.cpp4
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.cpp4
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.h4
-rw-r--r--lib/Target/Alpha/AlphaRegisterInfo.td4
-rw-r--r--lib/Target/Alpha/AlphaRelocations.h4
-rw-r--r--lib/Target/Alpha/AlphaSchedule.td4
-rw-r--r--lib/Target/Alpha/AlphaSubtarget.cpp4
-rw-r--r--lib/Target/Alpha/AlphaSubtarget.h4
-rw-r--r--lib/Target/Alpha/AlphaTargetAsmInfo.cpp4
-rw-r--r--lib/Target/Alpha/AlphaTargetAsmInfo.h4
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.cpp4
-rw-r--r--lib/Target/Alpha/AlphaTargetMachine.h4
-rw-r--r--lib/Target/CBackend/CBackend.cpp4
-rw-r--r--lib/Target/CBackend/CTargetMachine.h4
-rw-r--r--lib/Target/CellSPU/CellSDKIntrinsics.td6
-rw-r--r--lib/Target/CellSPU/SPU.h5
-rw-r--r--lib/Target/CellSPU/SPU.td5
-rw-r--r--lib/Target/CellSPU/SPUAsmPrinter.cpp8
-rw-r--r--lib/Target/CellSPU/SPUCallingConv.td5
-rw-r--r--lib/Target/CellSPU/SPUFrameInfo.cpp6
-rw-r--r--lib/Target/CellSPU/SPUFrameInfo.h5
-rw-r--r--lib/Target/CellSPU/SPUHazardRecognizers.cpp5
-rw-r--r--lib/Target/CellSPU/SPUHazardRecognizers.h5
-rw-r--r--lib/Target/CellSPU/SPUISelDAGToDAG.cpp7
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.cpp5
-rw-r--r--lib/Target/CellSPU/SPUISelLowering.h5
-rw-r--r--lib/Target/CellSPU/SPUInstrBuilder.h5
-rw-r--r--lib/Target/CellSPU/SPUInstrFormats.td5
-rw-r--r--lib/Target/CellSPU/SPUInstrInfo.cpp7
-rw-r--r--lib/Target/CellSPU/SPUInstrInfo.h5
-rw-r--r--lib/Target/CellSPU/SPUInstrInfo.td5
-rw-r--r--lib/Target/CellSPU/SPUMachineFunction.h5
-rw-r--r--lib/Target/CellSPU/SPUNodes.td8
-rw-r--r--lib/Target/CellSPU/SPUOperands.td5
-rw-r--r--lib/Target/CellSPU/SPURegisterInfo.cpp9
-rw-r--r--lib/Target/CellSPU/SPURegisterInfo.h5
-rw-r--r--lib/Target/CellSPU/SPURegisterInfo.td5
-rw-r--r--lib/Target/CellSPU/SPURegisterNames.h11
-rw-r--r--lib/Target/CellSPU/SPUSchedule.td5
-rw-r--r--lib/Target/CellSPU/SPUSubtarget.cpp5
-rw-r--r--lib/Target/CellSPU/SPUSubtarget.h11
-rw-r--r--lib/Target/CellSPU/SPUTargetAsmInfo.cpp5
-rw-r--r--lib/Target/CellSPU/SPUTargetAsmInfo.h7
-rw-r--r--lib/Target/CellSPU/SPUTargetMachine.cpp5
-rw-r--r--lib/Target/CellSPU/SPUTargetMachine.h5
-rw-r--r--lib/Target/IA64/IA64.h4
-rw-r--r--lib/Target/IA64/IA64.td4
-rw-r--r--lib/Target/IA64/IA64AsmPrinter.cpp4
-rw-r--r--lib/Target/IA64/IA64Bundling.cpp4
-rw-r--r--lib/Target/IA64/IA64ISelDAGToDAG.cpp4
-rw-r--r--lib/Target/IA64/IA64ISelLowering.cpp4
-rw-r--r--lib/Target/IA64/IA64ISelLowering.h4
-rw-r--r--lib/Target/IA64/IA64InstrBuilder.h4
-rw-r--r--lib/Target/IA64/IA64InstrFormats.td4
-rw-r--r--lib/Target/IA64/IA64InstrInfo.cpp4
-rw-r--r--lib/Target/IA64/IA64InstrInfo.h4
-rw-r--r--lib/Target/IA64/IA64InstrInfo.td4
-rw-r--r--lib/Target/IA64/IA64RegisterInfo.cpp4
-rw-r--r--lib/Target/IA64/IA64RegisterInfo.h4
-rw-r--r--lib/Target/IA64/IA64RegisterInfo.td4
-rw-r--r--lib/Target/IA64/IA64TargetAsmInfo.cpp4
-rw-r--r--lib/Target/IA64/IA64TargetAsmInfo.h4
-rw-r--r--lib/Target/IA64/IA64TargetMachine.cpp4
-rw-r--r--lib/Target/IA64/IA64TargetMachine.h4
-rw-r--r--lib/Target/MRegisterInfo.cpp4
-rw-r--r--lib/Target/MSIL/MSILWriter.cpp4
-rw-r--r--lib/Target/MSIL/MSILWriter.h4
-rw-r--r--lib/Target/Mips/Mips.h4
-rw-r--r--lib/Target/Mips/Mips.td4
-rw-r--r--lib/Target/Mips/MipsAsmPrinter.cpp4
-rw-r--r--lib/Target/Mips/MipsCallingConv.td4
-rw-r--r--lib/Target/Mips/MipsDelaySlotFiller.cpp4
-rw-r--r--lib/Target/Mips/MipsISelDAGToDAG.cpp4
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp4
-rw-r--r--lib/Target/Mips/MipsISelLowering.h4