3 files changed, 5 insertions, 3 deletions
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index 7ace3c10d4..fdf1dd338a 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -43,8 +43,9 @@ namespace {
       case PPC::IMPLICIT_DEF: // no asm emitted
         return 0;
       default:
-        return 4; // PowerPC instructions are all 4 bytes
+        break;
       }
+      return 4; // PowerPC instructions are all 4 bytes
     }
 
     virtual bool runOnMachineFunction(MachineFunction &Fn) {
diff --git a/lib/Target/SparcV9/SparcV9BurgISel.cpp b/lib/Target/SparcV9/SparcV9BurgISel.cpp
index ef3f9e09e4..be1baa3fe0 100644
--- a/lib/Target/SparcV9/SparcV9BurgISel.cpp
+++ b/lib/Target/SparcV9/SparcV9BurgISel.cpp
@@ -2915,8 +2915,9 @@ extern bool ThisIsAChainRule(int eruleno) {
       return true; break;
 
     default:
-      return false; break;
+      break;
     }
+  return false; 
 }
 
 /// GetInstructionsByRule - Choose machine instructions for the
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
index 0613161634..d977ff94ca 100644
--- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -56,7 +56,7 @@ unsigned
 SparcV9CodeEmitter::getRealRegNum(unsigned fakeReg,
                                   MachineInstr &MI) {
   const SparcV9RegInfo &RI = *TM.getRegInfo();
-  unsigned regClass, regType = RI.getRegType(fakeReg);
+  unsigned regClass = 0, regType = RI.getRegType(fakeReg);
   // At least map fakeReg into its class
   fakeReg = RI.getClassRegNum(fakeReg, regClass);