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-rw-r--r--lib/Target/X86/X86ISelPattern.cpp61
-rw-r--r--lib/Target/X86/X86ISelSimple.cpp44
2 files changed, 50 insertions, 55 deletions
diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index 8ffcc827e2..d28de2828d 100644
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -176,12 +176,16 @@ namespace {
SelectionDAG &DAG);
virtual std::pair<SDOperand, SDOperand>
- LowerVAStart(SDOperand Chain, SelectionDAG &DAG);
+ LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest);
virtual std::pair<SDOperand,SDOperand>
- LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
+ LowerVAArgNext(SDOperand Chain, SDOperand VAList,
const Type *ArgTy, SelectionDAG &DAG);
+ virtual std::pair<SDOperand,SDOperand>
+ LowerVACopy(SDOperand Chain, SDOperand Src, SDOperand Dest,
+ SelectionDAG &DAG);
+
virtual std::pair<SDOperand, SDOperand>
LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth,
SelectionDAG &DAG);
@@ -442,35 +446,44 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy,
return std::make_pair(ResultVal, Chain);
}
-std::pair<SDOperand, SDOperand>
-X86TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG) {
- // vastart just returns the address of the VarArgsFrameIndex slot.
- return std::make_pair(DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32), Chain);
+std::pair<SDOperand,SDOperand>
+X86TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest) {
+ // vastart just stores the address of the VarArgsFrameIndex slot.
+ SDOperand FR = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32);
+ SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain, FR, Dest, DAG.getSrcValue(NULL));
+ return std::make_pair(Result, Result);
}
-std::pair<SDOperand,SDOperand> X86TargetLowering::
-LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
- const Type *ArgTy, SelectionDAG &DAG) {
+std::pair<SDOperand,SDOperand>
+X86TargetLowering::LowerVAArgNext(SDOperand Chain, SDOperand VAList,
+ const Type *ArgTy, SelectionDAG &DAG) {
MVT::ValueType ArgVT = getValueType(ArgTy);
- SDOperand Result;
- if (!isVANext) {
- Result = DAG.getLoad(ArgVT, DAG.getEntryNode(), VAList,
- DAG.getSrcValue(NULL));
- } else {
- unsigned Amt;
- if (ArgVT == MVT::i32)
- Amt = 4;
- else {
- assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) &&
- "Other types should have been promoted for varargs!");
- Amt = 8;
- }
- Result = DAG.getNode(ISD::ADD, VAList.getValueType(), VAList,
- DAG.getConstant(Amt, VAList.getValueType()));
+ SDOperand Val = DAG.getLoad(MVT::i32, Chain, VAList, DAG.getSrcValue(NULL));
+ SDOperand Result = DAG.getLoad(ArgVT, Val.getValue(1), Val, DAG.getSrcValue(NULL));
+ unsigned Amt;
+ if (ArgVT == MVT::i32)
+ Amt = 4;
+ else {
+ assert((ArgVT == MVT::i64 || ArgVT == MVT::f64) &&
+ "Other types should have been promoted for varargs!");
+ Amt = 8;
}
+ Val = DAG.getNode(ISD::ADD, Val.getValueType(), Val,
+ DAG.getConstant(Amt, Val.getValueType()));
+ Chain = DAG.getNode(ISD::STORE, MVT::Other, Chain,
+ Val, VAList, DAG.getSrcValue(NULL));
return std::make_pair(Result, Chain);
}
+std::pair<SDOperand,SDOperand>
+X86TargetLowering::LowerVACopy(SDOperand Chain, SDOperand Src,
+ SDOperand Dest, SelectionDAG &DAG)
+{
+ SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Chain,
+ Src, Dest, DAG.getSrcValue(NULL));
+ return std::make_pair(Result, Result);
+}
+
//===----------------------------------------------------------------------===//
// Fast Calling Convention implementation
//===----------------------------------------------------------------------===//
diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index e5898a801b..148a590fc3 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -232,7 +232,6 @@ namespace {
void visitShiftInst(ShiftInst &I);
void visitPHINode(PHINode &I) {} // PHI nodes handled by second pass
void visitCastInst(CastInst &I);
- void visitVANextInst(VANextInst &I);
void visitVAArgInst(VAArgInst &I);
void visitInstruction(Instruction &I) {
@@ -1838,12 +1837,14 @@ void X86ISel::visitIntrinsicCall(Intrinsic::ID ID, CallInst &CI) {
unsigned TmpReg1, TmpReg2;
switch (ID) {
case Intrinsic::vastart:
+ //FIXME: store to first arg, don't return
// Get the address of the first vararg value...
TmpReg1 = getReg(CI);
addFrameReference(BuildMI(BB, X86::LEA32r, 5, TmpReg1), VarArgsFrameIndex);
return;
case Intrinsic::vacopy:
+ //FIXME: copy val of second into first (which is a ptr)
TmpReg1 = getReg(CI);
TmpReg2 = getReg(CI.getOperand(1));
BuildMI(BB, X86::MOV32rr, 1, TmpReg1).addReg(TmpReg2);
@@ -3745,38 +3746,12 @@ void X86ISel::emitCastOperation(MachineBasicBlock *BB,
abort();
}
-/// visitVANextInst - Implement the va_next instruction...
-///
-void X86ISel::visitVANextInst(VANextInst &I) {
- unsigned VAList = getReg(I.getOperand(0));
- unsigned DestReg = getReg(I);
-
- unsigned Size;
- switch (I.getArgType()->getTypeID()) {
- default:
- std::cerr << I;
- assert(0 && "Error: bad type for va_next instruction!");
- return;
- case Type::PointerTyID:
- case Type::UIntTyID:
- case Type::IntTyID:
- Size = 4;
- break;
- case Type::ULongTyID:
- case Type::LongTyID:
- case Type::DoubleTyID:
- Size = 8;
- break;
- }
-
- // Increment the VAList pointer...
- BuildMI(BB, X86::ADD32ri, 2, DestReg).addReg(VAList).addImm(Size);
-}
-
void X86ISel::visitVAArgInst(VAArgInst &I) {
- unsigned VAList = getReg(I.getOperand(0));
+ unsigned VAListPtr = getReg(I.getOperand(0));
unsigned DestReg = getReg(I);
-
+ unsigned VAList = makeAnotherReg(Type::IntTy);
+ addDirectMem(BuildMI(BB, X86::MOV32rm, 4, VAList), VAListPtr);
+ unsigned Size;
switch (I.getType()->getTypeID()) {
default:
std::cerr << I;
@@ -3785,17 +3760,24 @@ void X86ISel::visitVAArgInst(VAArgInst &I) {
case Type::PointerTyID:
case Type::UIntTyID:
case Type::IntTyID:
+ Size = 4;
addDirectMem(BuildMI(BB, X86::MOV32rm, 4, DestReg), VAList);
break;
case Type::ULongTyID:
case Type::LongTyID:
+ Size = 8;
addDirectMem(BuildMI(BB, X86::MOV32rm, 4, DestReg), VAList);
addRegOffset(BuildMI(BB, X86::MOV32rm, 4, DestReg+1), VAList, 4);
break;
case Type::DoubleTyID:
+ Size = 8;
addDirectMem(BuildMI(BB, X86::FLD64m, 4, DestReg), VAList);
break;
}
+ // Increment the VAList pointer...
+ unsigned NP = makeAnotherReg(Type::IntTy);
+ BuildMI(BB, X86::ADD32ri, 2, NP).addReg(VAList).addSImm(Size);
+ addDirectMem(BuildMI(BB, X86::MOV32rm, 5), VAListPtr).addReg(VAList);
}
/// visitGetElementPtrInst - instruction-select GEP instructions
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-08-04 22:48:36 +0000