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-rw-r--r--lib/Target/SparcV9/DecomposeMultiDimRefs.cpp22
-rw-r--r--lib/Target/SparcV9/EmitBytecodeToAssembly.cpp22
-rw-r--r--lib/Target/SparcV9/InstrSched/InstrScheduling.cpp412
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedGraph.cpp186
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedGraph.h62
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedGraphCommon.cpp40
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedPriorities.cpp54
-rw-r--r--lib/Target/SparcV9/InstrSched/SchedPriorities.h60
-rw-r--r--lib/Target/SparcV9/InternalGlobalMapper.cpp6
-rw-r--r--lib/Target/SparcV9/LiveVar/BBLiveVar.cpp54
-rw-r--r--lib/Target/SparcV9/LiveVar/BBLiveVar.h14
-rw-r--r--lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.cpp42
-rw-r--r--lib/Target/SparcV9/LiveVar/FunctionLiveVarInfo.h30
-rw-r--r--lib/Target/SparcV9/LiveVar/ValueSet.cpp6
-rw-r--r--lib/Target/SparcV9/MachineCodeForInstruction.cpp16
-rw-r--r--lib/Target/SparcV9/MachineCodeForInstruction.h18
-rw-r--r--lib/Target/SparcV9/MachineFunctionInfo.cpp30
-rw-r--r--lib/Target/SparcV9/MachineFunctionInfo.h28
-rw-r--r--lib/Target/SparcV9/MachineInstrAnnot.h30
-rw-r--r--lib/Target/SparcV9/MappingInfo.cpp28
-rw-r--r--lib/Target/SparcV9/MappingInfo.h4
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.cpp28
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/DependenceAnalyzer.h18
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/MSSchedule.cpp44
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/MSSchedule.h6
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/MSchedGraph.cpp190
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/MSchedGraph.h106
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.cpp636
-rw-r--r--lib/Target/SparcV9/ModuloScheduling/ModuloScheduling.h54
-rw-r--r--lib/Target/SparcV9/RegAlloc/AllocInfo.h10
-rw-r--r--lib/Target/SparcV9/RegAlloc/IGNode.cpp14
-rw-r--r--lib/Target/SparcV9/RegAlloc/IGNode.h22
-rw-r--r--lib/Target/SparcV9/RegAlloc/InterferenceGraph.cpp72
-rw-r--r--lib/Target/SparcV9/RegAlloc/InterferenceGraph.h20
-rw-r--r--lib/Target/SparcV9/RegAlloc/LiveRange.h24
-rw-r--r--lib/Target/SparcV9/RegAlloc/LiveRangeInfo.cpp80
-rw-r--r--lib/Target/SparcV9/RegAlloc/LiveRangeInfo.h28
-rw-r--r--lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp328
-rw-r--r--lib/Target/SparcV9/RegAlloc/PhyRegAlloc.h38
-rw-r--r--lib/Target/SparcV9/RegAlloc/RegAllocCommon.h8
-rw-r--r--lib/Target/SparcV9/RegAlloc/RegClass.cpp72
-rw-r--r--lib/Target/SparcV9/RegAlloc/RegClass.h28
-rw-r--r--lib/Target/SparcV9/SparcV9AsmPrinter.cpp72
-rw-r--r--lib/Target/SparcV9/SparcV9BurgISel.cpp720
-rw-r--r--lib/Target/SparcV9/SparcV9BurgISel.h6
-rw-r--r--lib/Target/SparcV9/SparcV9CodeEmitter.cpp28
-rw-r--r--lib/Target/SparcV9/SparcV9CodeEmitter.h20
-rw-r--r--lib/Target/SparcV9/SparcV9FrameInfo.cpp16
-rw-r--r--lib/Target/SparcV9/SparcV9FrameInfo.h14
-rw-r--r--lib/Target/SparcV9/SparcV9InstrForest.h12
-rw-r--r--lib/Target/SparcV9/SparcV9InstrInfo.h8
-rw-r--r--lib/Target/SparcV9/SparcV9Internals.h18
-rw-r--r--lib/Target/SparcV9/SparcV9JITInfo.cpp34
-rw-r--r--lib/Target/SparcV9/SparcV9JITInfo.h6
-rw-r--r--lib/Target/SparcV9/SparcV9PeepholeOpts.cpp18
-rw-r--r--lib/Target/SparcV9/SparcV9PreSelection.cpp30
-rw-r--r--lib/Target/SparcV9/SparcV9PrologEpilogInserter.cpp30
-rw-r--r--lib/Target/SparcV9/SparcV9RegClassInfo.cpp90
-rw-r--r--lib/Target/SparcV9/SparcV9RegClassInfo.h48
-rw-r--r--lib/Target/SparcV9/SparcV9RegInfo.cpp194
-rw-r--r--lib/Target/SparcV9/SparcV9RegInfo.h70
-rw-r--r--lib/Target/SparcV9/SparcV9RegisterInfo.cpp4
-rw-r--r--lib/Target/SparcV9/SparcV9RegisterInfo.h8
-rw-r--r--lib/Target/SparcV9/SparcV9Relocations.h4
-rw-r--r--lib/Target/SparcV9/SparcV9SchedInfo.cpp184
-rw-r--r--lib/Target/SparcV9/SparcV9StackSlots.cpp12
-rw-r--r--lib/Target/SparcV9/SparcV9TargetMachine.cpp40
-rw-r--r--lib/Target/SparcV9/SparcV9TargetMachine.h8
-rw-r--r--lib/Target/SparcV9/SparcV9TmpInstr.cpp4
-rw-r--r--lib/Target/SparcV9/SparcV9TmpInstr.h12
70 files changed, 2350 insertions, 2350 deletions
diff --git a/lib/Target/SparcV9/DecomposeMultiDimRefs.cpp b/lib/Target/SparcV9/DecomposeMultiDimRefs.cpp
index e530611647..1f6dbda199 100644
--- a/lib/Target/SparcV9/DecomposeMultiDimRefs.cpp
+++ b/lib/Target/SparcV9/DecomposeMultiDimRefs.cpp
@@ -1,10 +1,10 @@
//===- llvm/Transforms/DecomposeMultiDimRefs.cpp - Lower array refs to 1D -===//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// DecomposeMultiDimRefs - Convert multi-dimensional references consisting of
@@ -57,28 +57,28 @@ static inline bool isZeroConst (Value *V) {
}
// Function: DecomposeArrayRef()
-//
+//
// For any GetElementPtrInst with 2 or more array and structure indices:
-//
+//
// opCode CompositeType* P, [uint|ubyte] idx1, ..., [uint|ubyte] idxN
-//
+//
// this function generates the following sequence:
-//
+//
// ptr1 = getElementPtr P, idx1
// ptr2 = getElementPtr ptr1, 0, idx2
// ...
// ptrN-1 = getElementPtr ptrN-2, 0, idxN-1
// opCode ptrN-1, 0, idxN // New-MAI
-//
+//
// Then it replaces the original instruction with this sequence,
// and replaces all uses of the original instruction with New-MAI.
// If idx1 is 0, we simply omit the first getElementPtr instruction.
-//
+//
// On return: BBI points to the instruction after the current one
// (whether or not *BBI was replaced).
-//
+//
// Return value: true if the instruction was replaced; false otherwise.
-//
+//
bool llvm::DecomposeArrayRef(GetElementPtrInst* GEP) {
if (GEP->getNumIndices() < 2
|| (GEP->getNumIndices() == 2
@@ -97,7 +97,7 @@ bool llvm::DecomposeArrayRef(GetElementPtrInst* GEP) {
User::const_op_iterator OI = GEP->idx_begin(), OE = GEP->idx_end();
for (; OI+1 != OE; ++OI) {
std::vector<Value*> Indices;
-
+
// If this is the first index and is 0, skip it and move on!
if (OI == GEP->idx_begin()) {
if (isZeroConst (*OI))
diff --git a/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp b/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp
index 26332ca301..8df05ea885 100644
--- a/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp
+++ b/lib/Target/SparcV9/EmitBytecodeToAssembly.cpp
@@ -1,10 +1,10 @@
//===-- EmitBytecodeToAssembly.cpp - Emit bytecode to SparcV9 .s File ------==//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// This file implements the pass that writes LLVM bytecode as data to a sparc
@@ -31,7 +31,7 @@ namespace {
typedef int int_type;
typedef std::streampos pos_type;
typedef std::streamoff off_type;
-
+
sparcasmbuf(std::ostream &On) : BaseStr(On) {}
virtual int_type overflow(int_type C) {
@@ -65,19 +65,19 @@ namespace {
const std::string &symName) {
// Prologue:
// Output a comment describing the object.
- Out << "!" << comment << "\n";
+ Out << "!" << comment << "\n";
// Switch the current section to .rodata in the assembly output:
- Out << "\t.section \".rodata\"\n\t.align 8\n";
+ Out << "\t.section \".rodata\"\n\t.align 8\n";
// Output a global symbol naming the object:
- Out << "\t.global " << symName << "\n";
- Out << "\t.type " << symName << ",#object\n";
- Out << symName << ":\n";
+ Out << "\t.global " << symName << "\n";
+ Out << "\t.type " << symName << ",#object\n";
+ Out << symName << ":\n";
}
static void writeEpilogue (std::ostream &Out, const std::string &symName) {
// Epilogue:
// Output a local symbol marking the end of the object:
- Out << ".end_" << symName << ":\n";
+ Out << ".end_" << symName << ":\n";
// Output size directive giving the size of the object:
Out << "\t.size " << symName << ", .end_" << symName << "-" << symName
<< "\n";
@@ -90,7 +90,7 @@ namespace {
SparcV9BytecodeWriter(std::ostream &out) : Out(out) {}
const char *getPassName() const { return "Emit Bytecode to SparcV9 Assembly";}
-
+
virtual bool runOnModule(Module &M) {
// Write an object containing the bytecode to the SPARC assembly stream
writePrologue (Out, "LLVM BYTECODE OUTPUT", "LLVMBytecode");
@@ -101,7 +101,7 @@ namespace {
// Write an object containing its length as an integer to the
// SPARC assembly stream
writePrologue (Out, "LLVM BYTECODE LENGTH", "llvm_length");
- Out <<"\t.word\t.end_LLVMBytecode-LLVMBytecode\n";
+ Out <<"\t.word\t.end_LLVMBytecode-LLVMBytecode\n";
writeEpilogue (Out, "llvm_length");
return false;
diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
index f0ac384442..44f5c6ce4e 100644
--- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
+++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
@@ -1,10 +1,10 @@
//===- InstrScheduling.cpp - Generic Instruction Scheduling support -------===//
-//
+//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+//
//===----------------------------------------------------------------------===//
//
// This file implements the llvm/CodeGen/InstrScheduling.h interface, along with
@@ -50,7 +50,7 @@ class SchedulingManager;
//----------------------------------------------------------------------
// class InstrGroup:
-//
+//
// Represents a group of instructions scheduled to be issued
// in a single cycle.
//----------------------------------------------------------------------
@@ -58,26 +58,26 @@ class SchedulingManager;
class InstrGroup {
InstrGroup(const InstrGroup&); // DO NOT IMPLEMENT
void operator=(const InstrGroup&); // DO NOT IMPLEMENT
-
+
public:
inline const SchedGraphNode* operator[](unsigned int slotNum) const {
assert(slotNum < group.size());
return group[slotNum];
}
-
+
private:
friend class InstrSchedule;
-
+
inline void addInstr(const SchedGraphNode* node, unsigned int slotNum) {
assert(slotNum < group.size());
group[slotNum] = node;
}
-
+
/*ctor*/ InstrGroup(unsigned int nslots)
: group(nslots, NULL) {}
-
+
/*ctor*/ InstrGroup(); // disable: DO NOT IMPLEMENT
-
+
private:
std::vector<const SchedGraphNode*> group;
};
@@ -85,7 +85,7 @@ private:
//----------------------------------------------------------------------
// class ScheduleIterator:
-//
+//
// Iterates over the machine instructions in the for a single basic block.
// The schedule is represented by an InstrSchedule object.
//----------------------------------------------------------------------
@@ -98,34 +98,34 @@ private:
const InstrSchedule& S;
public:
typedef ScheduleIterator<_NodeType> _Self;
-
+
/*ctor*/ inline ScheduleIterator(const InstrSchedule& _schedule,
unsigned _cycleNum,
unsigned _slotNum)
: cycleNum(_cycleNum), slotNum(_slotNum), S(_schedule) {
- skipToNextInstr();
+ skipToNextInstr();
}
-
+
/*ctor*/ inline ScheduleIterator(const _Self& x)
: cycleNum(x.cycleNum), slotNum(x.slotNum), S(x.S) {}
-
+
inline bool operator==(const _Self& x) const {
return (slotNum == x.slotNum && cycleNum== x.cycleNum && &S==&x.S);
}
-
+
inline bool operator!=(const _Self& x) const { return !operator==(x); }
-
+
inline _NodeType* operator*() const;
inline _NodeType* operator->() const { return operator*(); }
-
+
_Self& operator++(); // Preincrement
inline _Self operator++(int) { // Postincrement
- _Self tmp(*this); ++*this; return tmp;
+ _Self tmp(*this); ++*this; return tmp;
}
-
+
static _Self begin(const InstrSchedule& _schedule);
static _Self end( const InstrSchedule& _schedule);
-
+
private:
inline _Self& operator=(const _Self& x); // DISABLE -- DO NOT IMPLEMENT
void skipToNextInstr();
@@ -134,7 +134,7 @@ private:
//----------------------------------------------------------------------
// class InstrSchedule:
-//
+//
// Represents the schedule of machine instructions for a single basic block.
//----------------------------------------------------------------------
@@ -146,28 +146,28 @@ class InstrSchedule {
InstrSchedule(InstrSchedule&); // DO NOT IMPLEMENT
void operator=(InstrSchedule&); // DO NOT IMPLEMENT
-
+
public: // iterators
typedef ScheduleIterator<SchedGraphNode> iterator;
typedef ScheduleIterator<const SchedGraphNode> const_iterator;
-
+
iterator begin() { return iterator::begin(*this); }
const_iterator begin() const { return const_iterator::begin(*this); }
iterator end() { return iterator::end(*this); }
const_iterator end() const { return const_iterator::end(*this); }
-
+
public: // constructors and destructor
/*ctor*/ InstrSchedule (unsigned int _nslots,
unsigned int _numNodes);
/*dtor*/ ~InstrSchedule ();
-
+
public: // accessor functions to query chosen schedule
const SchedGraphNode* getInstr (unsigned int slotNum,
CycleCount_t c) {
const InstrGroup* igroup = this->getIGroup(c);
return (igroup == NULL)? NULL : (*igroup)[slotNum];
}
-
+
inline InstrGroup* getIGroup (CycleCount_t c) {
if ((unsigned)c >= groups.size())
groups.resize(c+1);
@@ -175,21 +175,21 @@ public: // accessor functions to query chosen schedule
groups[c] = new InstrGroup(nslots);
return groups[c];
}
-
+
inline const InstrGroup* getIGroup (CycleCount_t c) const {
assert((unsigned)c < groups.size());
return groups[c];
}
-
+
inline CycleCount_t getStartTime (unsigned int nodeId) const {
assert(nodeId < startTime.size());
return startTime[nodeId];
}
-
+
unsigned int getNumInstructions() const {
return numInstr;
}
-
+
inline void scheduleInstr (const SchedGraphNode* node,
unsigned int slotNum,
CycleCount_t cycle) {
@@ -203,7 +203,7 @@ public: // accessor functions to query chosen schedule
startTime[node->getNodeId()] = cycle;
++numInstr;
}
-
+
private:
friend class ScheduleIterator<SchedGraphNode>;
friend class ScheduleIterator<const SchedGraphNode>;
@@ -237,13 +237,13 @@ InstrSchedule::~InstrSchedule()
template<class _NodeType>
-inline
+inline
void
ScheduleIterator<_NodeType>::skipToNextInstr()
{
while(cycleNum < S.groups.size() && S.groups[cycleNum] == NULL)
++cycleNum; // skip cycles with no instructions
-
+
while (cycleNum < S.groups.size() &&
(*S.groups[cycleNum])[slotNum] == NULL)
{
@@ -258,7 +258,7 @@ ScheduleIterator<_NodeType>::skipToNextInstr()
}
template<class _NodeType>
-inline
+inline
ScheduleIterator<_NodeType>&
ScheduleIterator<_NodeType>::operator++() // Preincrement
{
@@ -267,7 +267,7 @@ ScheduleIterator<_NodeType>::operator++() // Preincrement
++cycleNum;
slotNum = 0;
}
- skipToNextInstr();
+ skipToNextInstr();
return *this;
}
@@ -288,7 +288,7 @@ ScheduleIterator<_NodeType>::end(const InstrSchedule& _schedule)
//----------------------------------------------------------------------
// class DelaySlotInfo:
-//
+//
// Record information about delay slots for a single branch instruction.
// Delay slots are simply indexed by slot number 1 ... numDelaySlots
//----------------------------------------------------------------------
@@ -299,7 +299,7 @@ class DelaySlotInfo {
std::vector<const SchedGraphNode*> delayNodeVec;
CycleCount_t delayedNodeCycle;
unsigned delayedNodeSlotNum;
-
+
DelaySlotInfo(const DelaySlotInfo &); // DO NOT IMPLEMENT
void operator=(const DelaySlotInfo&); // DO NOT IMPLEMENT
public:
@@ -307,32 +307,32 @@ public:
unsigned _ndelays)
: brNode(_brNode), ndelays(_ndelays),
delayedNodeCycle(0), delayedNodeSlotNum(0) {}
-
+
inline unsigned getNumDelays () {
return ndelays;
}
-
+
inline const std::vector<const SchedGraphNode*>& getDelayNodeVec() {
return delayNodeVec;
}
-
+
inline void addDelayNode (const SchedGraphNode* node) {
delayNodeVec.push_back(node);
assert(delayNodeVec.size() <= ndelays && "Too many delay slot instrs!");
}
-
+
inline void recordChosenSlot (CycleCount_t cycle, unsigned slotNum) {
delayedNodeCycle = cycle;
delayedNodeSlotNum = slotNum;