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diff --git a/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp b/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
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--- a/lib/Target/SparcV9/ModuloScheduling/ModuloSchedulingSuperBlock.cpp
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@@ -1,3155 +0,0 @@
-//===-- ModuloSchedulingSuperBlock.cpp - ModuloScheduling--------*- C++ -*-===//
-//
-// The LLVM Compiler Infrastructure
-//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This ModuloScheduling pass is based on the Swing Modulo Scheduling
-// algorithm, but has been extended to support SuperBlocks (multiple
-// basic block, single entry, multipl exit loops).
-//
-//===----------------------------------------------------------------------===//
-
-#define DEBUG_TYPE "ModuloSchedSB"
-
-#include "DependenceAnalyzer.h"
-#include "ModuloSchedulingSuperBlock.h"
-#include "llvm/Constants.h"
-#include "llvm/ADT/Statistic.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/CFG.h"
-#include "llvm/Support/Debug.h"
-#include "llvm/Support/GraphWriter.h"
-#include "llvm/Support/Timer.h"
-#include "llvm/ADT/StringExtras.h"
-#include "llvm/ADT/SCCIterator.h"
-#include "llvm/Instructions.h"
-#include "../MachineCodeForInstruction.h"
-#include "../SparcV9RegisterInfo.h"
-#include "../SparcV9Internals.h"
-#include "../SparcV9TmpInstr.h"
-#include <fstream>
-#include <sstream>
-#include <cmath>
-#include <utility>
-
-using namespace llvm;
-/// Create ModuloSchedulingSBPass
-///
-FunctionPass *llvm::createModuloSchedulingSBPass(TargetMachine & targ) {
- DEBUG(std::cerr << "Created ModuloSchedulingSBPass\n");
- return new ModuloSchedulingSBPass(targ);
-}
-
-
-#if 1
-#define TIME_REGION(VARNAME, DESC) \
- NamedRegionTimer VARNAME(DESC)
-#else
-#define TIME_REGION(VARNAME, DESC)
-#endif
-
-
-//Graph Traits for printing out the dependence graph
-template<typename GraphType>
-static void WriteGraphToFileSB(std::ostream &O, const std::string &GraphName,
- const GraphType &GT) {
- std::string Filename = GraphName + ".dot";
- O << "Writing '" << Filename << "'...";
- std::ofstream F(Filename.c_str());
-
- if (F.good())
- WriteGraph(F, GT);
- else
- O << " error opening file for writing!";
- O << "\n";
-};
-
-namespace llvm {
- Statistic<> NumLoops("moduloschedSB-numLoops", "Total Number of Loops");
- Statistic<> NumSB("moduloschedSB-numSuperBlocks", "Total Number of SuperBlocks");
- Statistic<> BBWithCalls("modulosched-BBCalls", "Basic Blocks rejected due to calls");
- Statistic<> BBWithCondMov("modulosched-loopCondMov",
- "Basic Blocks rejected due to conditional moves");
- Statistic<> SBResourceConstraint("modulosched-resourceConstraint",
- "Loops constrained by resources");
- Statistic<> SBRecurrenceConstraint("modulosched-recurrenceConstraint",
- "Loops constrained by recurrences");
- Statistic<> SBFinalIISum("modulosched-finalIISum", "Sum of all final II");
- Statistic<> SBIISum("modulosched-IISum", "Sum of all theoretical II");
- Statistic<> SBMSLoops("modulosched-schedLoops", "Number of loops successfully modulo-scheduled");
- Statistic<> SBNoSched("modulosched-noSched", "No schedule");
- Statistic<> SBSameStage("modulosched-sameStage", "Max stage is 0");
- Statistic<> SBBLoops("modulosched-SBBLoops", "Number single basic block loops");
- Statistic<> SBInvalid("modulosched-SBInvalid", "Number invalid superblock loops");
- Statistic<> SBValid("modulosched-SBValid", "Number valid superblock loops");
- Statistic<> SBSize("modulosched-SBSize", "Total size of all valid superblocks");
-
- template<>
- struct DOTGraphTraits<MSchedGraphSB*> : public DefaultDOTGraphTraits {
- static std::string getGraphName(MSchedGraphSB *F) {
- return "Dependence Graph";
- }
-
- static std::string getNodeLabel(MSchedGraphSBNode *Node, MSchedGraphSB *Graph) {
- if(!Node->isPredicate()) {
- if (Node->getInst()) {
- std::stringstream ss;
- ss << *(Node->getInst());
- return ss.str(); //((MachineInstr*)Node->getInst());
- }
- else
- return "No Inst";
- }
- else
- return "Pred Node";
- }
- static std::string getEdgeSourceLabel(MSchedGraphSBNode *Node,
- MSchedGraphSBNode::succ_iterator I) {
- //Label each edge with the type of dependence
- std::string edgelabel = "";
- switch (I.getEdge().getDepOrderType()) {
-
- case MSchedGraphSBEdge::TrueDep:
- edgelabel = "True";
- break;
-
- case MSchedGraphSBEdge::AntiDep:
- edgelabel = "Anti";
- break;
-
- case MSchedGraphSBEdge::OutputDep:
- edgelabel = "Output";
- break;
-
- case MSchedGraphSBEdge::NonDataDep:
- edgelabel = "Pred";
- break;
-
- default:
- edgelabel = "Unknown";
- break;
- }
-
- //FIXME
- int iteDiff = I.getEdge().getIteDiff();
- std::string intStr = "(IteDiff: ";
- intStr += itostr(iteDiff);
-
- intStr += ")";
- edgelabel += intStr;
-
- return edgelabel;
- }
- };
-
- bool ModuloSchedulingSBPass::runOnFunction(Function &F) {
- bool Changed = false;
-
- //Get MachineFunction
- MachineFunction &MF = MachineFunction::get(&F);
-
- //Get Loop Info & Dependence Anaysis info
- LoopInfo &LI = getAnalysis<LoopInfo>();
- DependenceAnalyzer &DA = getAnalysis<DependenceAnalyzer>();
-
- //Worklist of superblocks
- std::vector<std::vector<const MachineBasicBlock*> > Worklist;
- FindSuperBlocks(F, LI, Worklist);
-
- DEBUG(if(Worklist.size() == 0) std::cerr << "No superblocks in function to ModuloSchedule\n");
-
- //Loop over worklist and ModuloSchedule each SuperBlock
- for(std::vector<std::vector<const MachineBasicBlock*> >::iterator SB = Worklist.begin(),
- SBE = Worklist.end(); SB != SBE; ++SB) {
-
- //Print out Superblock
- DEBUG(std::cerr << "ModuloScheduling SB: \n";
- for(std::vector<const MachineBasicBlock*>::const_iterator BI = SB->begin(),
- BE = SB->end(); BI != BE; ++BI) {
- (*BI)->print(std::cerr);});
-
- if(!CreateDefMap(*SB)) {
- defaultInst = 0;
- defMap.clear();
- continue;
- }
-
- MSchedGraphSB *MSG = new MSchedGraphSB(*SB, target, indVarInstrs[*SB], DA,
- machineTollvm[*SB]);
-
- //Write Graph out to file
- DEBUG(WriteGraphToFileSB(std::cerr, F.getName(), MSG));
-
- //Calculate Resource II
- int ResMII = calculateResMII(*SB);
-
- //Calculate Recurrence II
- int RecMII = calculateRecMII(MSG, ResMII);
-
- DEBUG(std::cerr << "Number of reccurrences found: " << recurrenceList.size() << "\n");
-
- //Our starting initiation interval is the maximum of RecMII and ResMII
- if(RecMII < ResMII)
- ++SBRecurrenceConstraint;
- else
- ++SBResourceConstraint;
-
- II = std::max(RecMII, ResMII);
- int mII = II;
-
-
- //Print out II, RecMII, and ResMII
- DEBUG(std::cerr << "II starts out as " << II << " ( RecMII=" << RecMII << " and ResMII=" << ResMII << ")\n");
-
- //Calculate Node Properties
- calculateNodeAttributes(MSG, ResMII);
-
- //Dump node properties if in debug mode
- DEBUG(for(std::map<MSchedGraphSBNode*, MSNodeSBAttributes>::iterator I = nodeToAttributesMap.begin(),
- E = nodeToAttributesMap.end(); I !=E; ++I) {
- std::cerr << "Node: " << *(I->first) << " ASAP: " << I->second.ASAP << " ALAP: "
- << I->second.ALAP << " MOB: " << I->second.MOB << " Depth: " << I->second.depth
- << " Height: " << I->second.height << "\n";
- });
-
-
- //Put nodes in order to schedule them
- computePartialOrder();
-
- //Dump out partial order
- DEBUG(for(std::vector<std::set<MSchedGraphSBNode*> >::iterator I = partialOrder.begin(),
- E = partialOrder.end(); I !=E; ++I) {
- std::cerr << "Start set in PO\n";
- for(std::set<MSchedGraphSBNode*>::iterator J = I->begin(), JE = I->end(); J != JE; ++J)
- std::cerr << "PO:" << **J << "\n";
- });
-
- //Place nodes in final order
- orderNodes();
-
- //Dump out order of nodes
- DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator I = FinalNodeOrder.begin(), E = FinalNodeOrder.end(); I != E; ++I) {
- std::cerr << "FO:" << **I << "\n";
- });
-
-
- //Finally schedule nodes
- bool haveSched = computeSchedule(*SB, MSG);
-
- //Print out final schedule
- DEBUG(schedule.print(std::cerr));
-
- //Final scheduling step is to reconstruct the loop only if we actual have
- //stage > 0
- if(haveSched) {
- //schedule.printSchedule(std::cerr);
- reconstructLoop(*SB);
- ++SBMSLoops;
- //Changed = true;
- SBIISum += mII;
- SBFinalIISum += II;
-
- if(schedule.getMaxStage() == 0)
- ++SBSameStage;
- }
- else
- ++SBNoSched;
-
- //Clear out our maps for the next basic block that is processed
- nodeToAttributesMap.clear();
- partialOrder.clear();
- recurrenceList.clear();
- FinalNodeOrder.clear();
- schedule.clear();
- defMap.clear();
-
- }
- return Changed;
- }
-
- void ModuloSchedulingSBPass::FindSuperBlocks(Function &F, LoopInfo &LI,
- std::vector<std::vector<const MachineBasicBlock*> > &Worklist) {
-
- //Get MachineFunction
- MachineFunction &MF = MachineFunction::get(&F);
-
- //Map of LLVM BB to machine BB
- std::map<BasicBlock*, MachineBasicBlock*> bbMap;
-
- for (MachineFunction::iterator BI = MF.begin(); BI != MF.end(); ++BI) {
- BasicBlock *llvmBB = (BasicBlock*) BI->getBasicBlock();
- assert(!bbMap.count(llvmBB) && "LLVM BB already in map!");
- bbMap[llvmBB] = &*BI;
- }
-
- //Iterate over the loops, and find super blocks
- for(LoopInfo::iterator LB = LI.begin(), LE = LI.end(); LB != LE; ++LB) {
- Loop *L = *LB;
- ++NumLoops;
-
- //If loop is not single entry, try the next one
- if(!L->getLoopPreheader())
- continue;
-
- //Check size of this loop, we don't want SBB loops
- if(L->getBlocks().size() == 1)
- continue;
-
- //Check if this loop contains no sub loops
- if(L->getSubLoops().size() == 0) {
-
- std::vector<const MachineBasicBlock*> superBlock;
-
- //Get Loop Headers
- BasicBlock *header = L->getHeader();
-
- //Follow the header and make sure each BB only has one entry and is valid
- BasicBlock *current = header;
- assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB\n");
- MachineBasicBlock *currentMBB = bbMap[header];
- bool done = false;
- bool success = true;
- unsigned offset = 0;
- std::map<const MachineInstr*, unsigned> indexMap;
-
- while(!done) {
- //Loop over successors of this BB, they should be in the
- //loop block and be valid
- BasicBlock *next = 0;
- for(succ_iterator I = succ_begin(current), E = succ_end(current);
- I != E; ++I) {
- if(L->contains(*I)) {
- if(!next)
- next = *I;
- else {
- done = true;
- success = false;
- break;
- }
- }
- }
-
- if(success) {
- superBlock.push_back(currentMBB);
- if(next == header)
- done = true;
- else if(!next->getSinglePredecessor()) {
- done = true;
- success = false;
- }
- else {
- //Check that the next BB only has one entry
- current = next;
- assert(bbMap.count(current) && "LLVM BB must have corresponding Machine BB");
- currentMBB = bbMap[current];
- }
- }
- }
-
-
-
-
-
- if(success) {
- ++NumSB;
-
- //Loop over all the blocks in the superblock
- for(std::vector<const MachineBasicBlock*>::iterator currentMBB = superBlock.begin(), MBBEnd = superBlock.end(); currentMBB != MBBEnd; ++currentMBB) {
- if(!MachineBBisValid(*currentMBB, indexMap, offset)) {
- success = false;
- break;
- }
- }
- }
-
- if(success) {
- if(getIndVar(superBlock, bbMap, indexMap)) {
- ++SBValid;
- Worklist.push_back(superBlock);
- SBSize += superBlock.size();
- }
- else
- ++SBInvalid;
- }
- }
- }
- }
-
-
- bool ModuloSchedulingSBPass::getIndVar(std::vector<const MachineBasicBlock*> &superBlock, std::map<BasicBlock*, MachineBasicBlock*> &bbMap,
- std::map<const MachineInstr*, unsigned> &indexMap) {
- //See if we can get induction var instructions
- std::set<const BasicBlock*> llvmSuperBlock;
-
- for(unsigned i =0; i < superBlock.size(); ++i)
- llvmSuperBlock.insert(superBlock[i]->getBasicBlock());
-
- //Get Target machine instruction info
- const TargetInstrInfo *TMI = target.getInstrInfo();
-
- //Get the loop back branch
- BranchInst *b = dyn_cast<BranchInst>(((BasicBlock*) (superBlock[superBlock.size()-1])->getBasicBlock())->getTerminator());
- std::set<Instruction*> indVar;
-
- if(b->isConditional()) {
- //Get the condition for the branch
- Value *cond = b->getCondition();
-
- DEBUG(std::cerr << "Condition: " << *cond << "\n");
-
- //List of instructions associated with induction variable
- std::vector<Instruction*> stack;
-
- //Add branch
- indVar.insert(b);
-
- if(Instruction *I = dyn_cast<Instruction>(cond))
- if(bbMap.count(I->getParent())) {
- if (!assocIndVar(I, indVar, stack, bbMap, superBlock[(superBlock.size()-1)]->getBasicBlock(), llvmSuperBlock))
- return false;
- }
- else
- return false;
- else
- return false;
- }
- else {
- indVar.insert(b);
- }
-
- //Dump out instructions associate with indvar for debug reasons
- DEBUG(for(std::set<Instruction*>::iterator N = indVar.begin(), NE = indVar.end();
- N != NE; ++N) {
- std::cerr << **N << "\n";
- });
-
- //Create map of machine instr to llvm instr
- std::map<MachineInstr*, Instruction*> mllvm;
- for(std::vector<const MachineBasicBlock*>::iterator MBB = superBlock.begin(), MBE = superBlock.end(); MBB != MBE; ++MBB) {
- BasicBlock *BB = (BasicBlock*) (*MBB)->getBasicBlock();
- for(BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I) {
- MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(I);
- for (unsigned j = 0; j < tempMvec.size(); j++) {
- mllvm[tempMvec[j]] = I;
- }
- }
- }
-
- //Convert list of LLVM Instructions to list of Machine instructions
- std::map<const MachineInstr*, unsigned> mIndVar;
- for(std::set<Instruction*>::iterator N = indVar.begin(),
- NE = indVar.end(); N != NE; ++N) {
-
- //If we have a load, we can't handle this loop because
- //there is no way to preserve dependences between loads
- //and stores
- if(isa<LoadInst>(*N))
- return false;
-
- MachineCodeForInstruction & tempMvec = MachineCodeForInstruction::get(*N);
- for (unsigned j = 0; j < tempMvec.size(); j++) {
- MachineOpCode OC = (tempMvec[j])->getOpcode();
- if(TMI->isNop(OC))
- continue;
- if(!indexMap.count(tempMvec[j]))
- continue;
- mIndVar[(MachineInstr*) tempMvec[j]] = indexMap[(MachineInstr*) tempMvec[j]];
- DEBUG(std::cerr << *(tempMvec[j]) << " at index " << indexMap[(MachineInstr*) tempMvec[j]] << "\n");
- }
- }
-
- //Put into a map for future access
- indVarInstrs[superBlock] = mIndVar;
- machineTollvm[superBlock] = mllvm;
-
- return true;
-
- }
-
- bool ModuloSchedulingSBPass::assocIndVar(Instruction *I,
- std::set<Instruction*> &indVar,
- std::vector<Instruction*> &stack,
- std::map<BasicBlock*, MachineBasicBlock*> &bbMap,
- const BasicBlock *last, std::set<const BasicBlock*> &llvmSuperBlock) {
-
- stack.push_back(I);
-
- //If this is a phi node, check if its the canonical indvar
- if(PHINode *PN = dyn_cast<PHINode>(I)) {
- if(llvmSuperBlock.count(PN->getParent())) {
- if (Instruction *Inc =
- dyn_cast<Instruction>(PN->getIncomingValueForBlock(last)))
- if (Inc->getOpcode() == Instruction::Add && Inc->getOperand(0) == PN)
- if (ConstantInt *CI = dyn_cast<ConstantInt>(Inc->getOperand(1)))
- if (CI->equalsInt(1)) {
- //We have found the indvar, so add the stack, and inc instruction to the set
- indVar.insert(stack.begin(), stack.end());
- indVar.insert(Inc);
- stack.pop_back();
- return true;
- }
- return false;
- }
- }
- else {
- //Loop over each of the instructions operands, check if they are an instruction and in this BB
- for(unsigned i = 0; i < I->getNumOperands(); ++i) {
- if(Instruction *N = dyn_cast<Instruction>(I->getOperand(i))) {
- if(bbMap.count(N->getParent()))
- if(!assocIndVar(N, indVar, stack, bbMap, last, llvmSuperBlock))
- return false;
- }
- }
- }
-
- stack.pop_back();
- return true;
- }
-
-
- /// This function checks if a Machine Basic Block is valid for modulo
- /// scheduling. This means that it has no control flow (if/else or
- /// calls) in the block. Currently ModuloScheduling only works on
- /// single basic block loops.
- bool ModuloSchedulingSBPass::MachineBBisValid(const MachineBasicBlock *BI,
- std::map<const MachineInstr*, unsigned> &indexMap,
- unsigned &offset) {
-
- //Check size of our basic block.. make sure we have more then just the terminator in it
- if(BI->getBasicBlock()->size() == 1)
- return false;
-
- //Get Target machine instruction info
- const TargetInstrInfo *TMI = target.getInstrInfo();
-
- unsigned count = 0;
- for(MachineBasicBlock::const_iterator I = BI->begin(), E = BI->end(); I != E; ++I) {
- //Get opcode to check instruction type
- MachineOpCode OC = I->getOpcode();
-
- //Look for calls
- if(TMI->isCall(OC)) {
- ++BBWithCalls;
- return false;
- }
-
- //Look for conditional move
- if(OC == V9::MOVRZr || OC == V9::MOVRZi || OC == V9::MOVRLEZr || OC == V9::MOVRLEZi
- || OC == V9::MOVRLZr || OC == V9::MOVRLZi || OC == V9::MOVRNZr || OC == V9::MOVRNZi
- || OC == V9::MOVRGZr || OC == V9::MOVRGZi || OC == V9::MOVRGEZr
- || OC == V9::MOVRGEZi || OC == V9::MOVLEr || OC == V9::MOVLEi || OC == V9::MOVLEUr
- || OC == V9::MOVLEUi || OC == V9::MOVFLEr || OC == V9::MOVFLEi
- || OC == V9::MOVNEr || OC == V9::MOVNEi || OC == V9::MOVNEGr || OC == V9::MOVNEGi
- || OC == V9::MOVFNEr || OC == V9::MOVFNEi) {
- ++BBWithCondMov;
- return false;
- }
-
- indexMap[I] = count + offset;
-
- if(TMI->isNop(OC))
- continue;
-
- ++count;
- }
-
- offset += count;
-
- return true;
- }
-}
-
-bool ModuloSchedulingSBPass::CreateDefMap(std::vector<const MachineBasicBlock*> &SB) {
- defaultInst = 0;
-
- for(std::vector<const MachineBasicBlock*>::iterator BI = SB.begin(),
- BE = SB.end(); BI != BE; ++BI) {
-
- for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) {
- for(unsigned opNum = 0; opNum < I->getNumOperands(); ++opNum) {
- const MachineOperand &mOp = I->getOperand(opNum);
- if(mOp.getType() == MachineOperand::MO_VirtualRegister && mOp.isDef()) {
- Value *V = mOp.getVRegValue();
- //assert if this is the second def we have seen
- if(defMap.count(V) && isa<PHINode>(V))
- DEBUG(std::cerr << "FIXME: Dup def for phi!\n");
- else {
- //assert(!defMap.count(V) && "Def already in the map");
- if(defMap.count(V))
- return false;
- defMap[V] = (MachineInstr*) &*I;
- }
- }
-
- //See if we can use this Value* as our defaultInst
- if(!defaultInst && mOp.getType() == MachineOperand::MO_VirtualRegister) {
- Value *V = mOp.getVRegValue();
- if(!isa<TmpInstruction>(V) && !isa<Argument>(V) && !isa<Constant>(V) && !isa<PHINode>(V))
- defaultInst = (Instruction*) V;
- }
- }
- }
- }
-
- if(!defaultInst)
- return false;
-
- return true;
-
-}
-
-
-//ResMII is calculated by determining the usage count for each resource
-//and using the maximum.
-//FIXME: In future there should be a way to get alternative resources
-//for each instruction
-int ModuloSchedulingSBPass::calculateResMII(std::vector<const MachineBasicBlock*> &superBlock) {
-
- TIME_REGION(X, "calculateResMII");
-
- const TargetInstrInfo *mii = target.getInstrInfo();
- const TargetSchedInfo *msi = target.getSchedInfo();
-
- int ResMII = 0;
-
- //Map to keep track of usage count of each resource
- std::map<unsigned, unsigned> resourceUsageCount;
-
- for(std::vector<const MachineBasicBlock*>::iterator BI = superBlock.begin(), BE = superBlock.end(); BI != BE; ++BI) {
- for(MachineBasicBlock::const_iterator I = (*BI)->begin(), E = (*BI)->end(); I != E; ++I) {
-
- //Get resource usage for this instruction
- InstrRUsage rUsage = msi->getInstrRUsage(I->getOpcode());
- std::vector<std::vector<resourceId_t> > resources = rUsage.resourcesByCycle;
-
- //Loop over resources in each cycle and increments their usage count
- for(unsigned i=0; i < resources.size(); ++i)
- for(unsigned j=0; j < resources[i].size(); ++j) {
- if(!resourceUsageCount.count(resources[i][j])) {
- resourceUsageCount[resources[i][j]] = 1;
- }
- else {
- resourceUsageCount[resources[i][j]] = resourceUsageCount[resources[i][j]] + 1;
- }
- }
- }
- }
-
- //Find maximum usage count
-
- //Get max number of instructions that can be issued at once. (FIXME)
- int issueSlots = msi->maxNumIssueTotal;
-
- for(std::map<unsigned,unsigned>::iterator RB = resourceUsageCount.begin(), RE = resourceUsageCount.end(); RB != RE; ++RB) {
-
- //Get the total number of the resources in our cpu
- int resourceNum = CPUResource::getCPUResource(RB->first)->maxNumUsers;
-
- //Get total usage count for this resources
- unsigned usageCount = RB->second;
-
- //Divide the usage count by either the max number we can issue or the number of
- //resources (whichever is its upper bound)
- double finalUsageCount;
- DEBUG(std::cerr << "Resource Num: " << RB->first << " Usage: " << usageCount << " TotalNum: " << resourceNum << "\n");
-
- if( resourceNum <= issueSlots)
- finalUsageCount = ceil(1.0 * usageCount / resourceNum);
- else
- finalUsageCount = ceil(1.0 * usageCount / issueSlots);
-
-
- //Only keep track of the max
- ResMII = std::max( (int) finalUsageCount, ResMII);
-
- }
-
- return ResMII;
-
-}
-
-/// calculateRecMII - Calculates the value of the highest recurrence
-/// By value we mean the total latency/distance
-int ModuloSchedulingSBPass::calculateRecMII(MSchedGraphSB *graph, int MII) {
-
- TIME_REGION(X, "calculateRecMII");
-
- findAllCircuits(graph, MII);
- int RecMII = 0;
-
- for(std::set<std::pair<int, std::vector<MSchedGraphSBNode*> > >::iterator I = recurrenceList.begin(), E=recurrenceList.end(); I !=E; ++I) {
- RecMII = std::max(RecMII, I->first);
- }
-
- return MII;
-}
-
-int CircCountSB;
-
-void ModuloSchedulingSBPass::unblock(MSchedGraphSBNode *u, std::set<MSchedGraphSBNode*> &blocked,
- std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B) {
-
- //Unblock u
- DEBUG(std::cerr << "Unblocking: " << *u << "\n");
- blocked.erase(u);
-
- //std::set<MSchedGraphSBNode*> toErase;
- while (!B[u].empty()) {
- MSchedGraphSBNode *W = *B[u].begin();
- B[u].erase(W);
- //toErase.insert(*W);
- DEBUG(std::cerr << "Removed: " << *W << "from B-List\n");
- if(blocked.count(W))
- unblock(W, blocked, B);
- }
-
-}
-
-void ModuloSchedulingSBPass::addSCC(std::vector<MSchedGraphSBNode*> &SCC, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) {
-
- int totalDelay = 0;
- int totalDistance = 0;
- std::vector<MSchedGraphSBNode*> recc;
- MSchedGraphSBNode *start = 0;
- MSchedGraphSBNode *end = 0;
-
- //Loop over recurrence, get delay and distance
- for(std::vector<MSchedGraphSBNode*>::iterator N = SCC.begin(), NE = SCC.end(); N != NE; ++N) {
- DEBUG(std::cerr << **N << "\n");
- totalDelay += (*N)->getLatency();
-
- for(unsigned i = 0; i < (*N)->succ_size(); ++i) {
- MSchedGraphSBEdge *edge = (*N)->getSuccessor(i);
- if(find(SCC.begin(), SCC.end(), edge->getDest()) != SCC.end()) {
- totalDistance += edge->getIteDiff();
- if(edge->getIteDiff() > 0)
- if(!start && !end) {
- start = *N;
- end = edge->getDest();
- }
-
- }
- }
-
-
- //Get the original node
- recc.push_back(newNodes[*N]);
-
-
- }
-
- DEBUG(std::cerr << "End Recc\n");
-
-
- assert( (start && end) && "Must have start and end node to ignore edge for SCC");
-
- if(start && end) {
- //Insert reccurrence into the list
- DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n");
- edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start])));
- }
-
- int lastII = totalDelay / totalDistance;
-
-
- recurrenceList.insert(std::make_pair(lastII, recc));
-
-}
-
-bool ModuloSchedulingSBPass::circuit(MSchedGraphSBNode *v, std::vector<MSchedGraphSBNode*> &stack,
- std::set<MSchedGraphSBNode*> &blocked, std::vector<MSchedGraphSBNode*> &SCC,
- MSchedGraphSBNode *s, std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > &B,
- int II, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) {
- bool f = false;
-
- DEBUG(std::cerr << "Finding Circuits Starting with: ( " << v << ")"<< *v << "\n");
-
- //Push node onto the stack
- stack.push_back(v);
-
- //block this node
- blocked.insert(v);
-
- //Loop over all successors of node v that are in the scc, create Adjaceny list
- std::set<MSchedGraphSBNode*> AkV;
- for(MSchedGraphSBNode::succ_iterator I = v->succ_begin(), E = v->succ_end(); I != E; ++I) {
- if((std::find(SCC.begin(), SCC.end(), *I) != SCC.end())) {
- AkV.insert(*I);
- }
- }
-
- for(std::set<MSchedGraphSBNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I) {
- if(*I == s) {
- //We have a circuit, so add it to our list
- addRecc(stack, newNodes);
- f = true;
- }
- else if(!blocked.count(*I)) {
- if(circuit(*I, stack, blocked, SCC, s, B, II, newNodes))
- f = true;
- }
- else
- DEBUG(std::cerr << "Blocked: " << **I << "\n");
- }
-
-
- if(f) {
- unblock(v, blocked, B);
- }
- else {
- for(std::set<MSchedGraphSBNode*>::iterator I = AkV.begin(), E = AkV.end(); I != E; ++I)
- B[*I].insert(v);
-
- }
-
- //Pop v
- stack.pop_back();
-
- return f;
-
-}
-
-void ModuloSchedulingSBPass::addRecc(std::vector<MSchedGraphSBNode*> &stack, std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> &newNodes) {
- std::vector<MSchedGraphSBNode*> recc;
- //Dump recurrence for now
- DEBUG(std::cerr << "Starting Recc\n");
-
- int totalDelay = 0;
- int totalDistance = 0;
- MSchedGraphSBNode *lastN = 0;
- MSchedGraphSBNode *start = 0;
- MSchedGraphSBNode *end = 0;
-
- //Loop over recurrence, get delay and distance
- for(std::vector<MSchedGraphSBNode*>::iterator N = stack.begin(), NE = stack.end(); N != NE; ++N) {
- DEBUG(std::cerr << **N << "\n");
- totalDelay += (*N)->getLatency();
- if(lastN) {
- int iteDiff = (*N)->getInEdge(lastN).getIteDiff();
- totalDistance += iteDiff;
-
- if(iteDiff > 0) {
- start = lastN;
- end = *N;
- }
- }
- //Get the original node
- lastN = *N;
- recc.push_back(newNodes[*N]);
-
-
- }
-
- //Get the loop edge
- totalDistance += lastN->getIteDiff(*stack.begin());
-
- DEBUG(std::cerr << "End Recc\n");
- CircCountSB++;
-
- if(start && end) {
- //Insert reccurrence into the list
- DEBUG(std::cerr << "Ignore Edge from!!: " << *start << " to " << *end << "\n");
- edgesToIgnore.insert(std::make_pair(newNodes[start], (newNodes[end])->getInEdgeNum(newNodes[start])));
- }
- else {
- //Insert reccurrence into the list
- DEBUG(std::cerr << "Ignore Edge from: " << *lastN << " to " << **stack.begin() << "\n");
- edgesToIgnore.insert(std::make_pair(newNodes[lastN], newNodes[(*stack.begin())]->getInEdgeNum(newNodes[lastN])));
-
- }
- //Adjust II until we get close to the inequality delay - II*distance <= 0
- int RecMII = II; //Starting value
- int value = totalDelay-(RecMII * totalDistance);
- int lastII = II;
- while(value < 0) {
-
- lastII = RecMII;
- RecMII--;
- value = totalDelay-(RecMII * totalDistance);
- }
-
- recurrenceList.insert(std::make_pair(lastII, recc));
-
-}
-
-
-void ModuloSchedulingSBPass::findAllCircuits(MSchedGraphSB *g, int II) {
-
- CircCountSB = 0;
-
- //Keep old to new node mapping information
- std::map<MSchedGraphSBNode*, MSchedGraphSBNode*> newNodes;
-
- //copy the graph
- MSchedGraphSB *MSG = new MSchedGraphSB(*g, newNodes);
-
- DEBUG(std::cerr << "Finding All Circuits\n");
-
- //Set of blocked nodes
- std::set<MSchedGraphSBNode*> blocked;
-
- //Stack holding current circuit
- std::vector<MSchedGraphSBNode*> stack;
-
- //Map for B Lists
- std::map<MSchedGraphSBNode*, std::set<MSchedGraphSBNode*> > B;
-
- //current node
- MSchedGraphSBNode *s;
-
-
- //Iterate over the graph until its down to one node or empty
- while(MSG->size() > 1) {
-
- //Write Graph out to file
- //WriteGraphToFile(std::cerr, "Graph" + utostr(MSG->size()), MSG);
-
- DEBUG(std::cerr << "Graph Size: " << MSG->size() << "\n");
- DEBUG(std::cerr << "Finding strong component Vk with least vertex\n");
-
- //Iterate over all the SCCs in the graph
- std::set<MSchedGraphSBNode*> Visited;
- std::vector<MSchedGraphSBNode*> Vk;
- MSchedGraphSBNode* s = 0;
- int numEdges = 0;
-
- //Find scc with the least vertex
- for (MSchedGraphSB::iterator GI = MSG->begin(), E = MSG->end(); GI != E; ++GI)
- if (Visited.insert(GI->second).second) {
- for (scc_iterator<MSchedGraphSBNode*> SCCI = scc_begin(GI->second),
- E = scc_end(GI->second); SCCI != E; ++SCCI) {
- std::vector<MSchedGraphSBNode*> &nextSCC = *SCCI;
-
- if (Visited.insert(nextSCC[0]).second) {
- Visited.insert(nextSCC.begin()+1, nextSCC.end());
-
- if(nextSCC.size() > 1) {
- DEBUG(std::cerr << "SCC size: " << nextSCC.size() << "\n");
-
- for(unsigned i = 0; i < nextSCC.size(); ++i) {
- //Loop over successor and see if in scc, then count edge
- MSchedGraphSBNode *node = nextSCC[i];
- for(MSchedGraphSBNode::succ_iterator S = node->succ_begin(), SE = node->succ_end(); S != SE; ++S) {
- if(find(nextSCC.begin(), nextSCC.end(), *S) != nextSCC.end())
- numEdges++;
- }
- }
- DEBUG(std::cerr << "Num Edges: " << numEdges << "\n");
- }
-
- //Ignore self loops
- if(nextSCC.size() > 1) {
-
- //Get least vertex in Vk
- if(!s) {
- s = nextSCC[0];
- Vk = nextSCC;
- }
-
- for(unsigned i = 0; i < nextSCC.size(); ++i) {
- if(nextSCC[i] < s) {
- s = nextSCC[i];
- Vk = nextSCC;
- }
- }
- }
- }
- }
- }
-
-
-
- //Process SCC
- DEBUG(for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end();
- N != NE; ++N) { std::cerr << *((*N)->getInst()); });
-
- //Iterate over all nodes in this scc
- for(std::vector<MSchedGraphSBNode*>::iterator N = Vk.begin(), NE = Vk.end();
- N != NE; ++N) {
- blocked.erase(*N);
- B[*N].clear();
- }
- if(Vk.size() > 1) {
- if(numEdges < 98)
- circuit(s, stack, blocked, Vk, s, B, II, newNodes);
- else
- addSCC(Vk, newNodes);
-
-
- //Delete nodes from the graph
- //Find all nodes up to s and delete them
- std::vector<MSchedGraphSBNode*> nodesToRemove;
- nodesToRemove.push_back(s);
- for(MSchedGraphSB::iterator N = MSG->begin(), NE = MSG->end(); N != NE; ++N) {
- if(N->second < s )
- nodesToRemove.push_back(N->second);
- }
- for(std::vector<MSchedGraphSBNode*>::iterator N = nodesToRemove.begin(), NE = nodesToRemove.end(); N !=