aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Sparc/SparcISelLowering.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'lib/Target/Sparc/SparcISelLowering.cpp')
-rw-r--r--lib/Target/Sparc/SparcISelLowering.cpp19
1 files changed, 10 insertions, 9 deletions
diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index 850d8e3725..4f5060ed99 100644
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -22,6 +22,7 @@
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/ADT/VectorExtras.h"
+#include "llvm/Support/ErrorHandling.h"
using namespace llvm;
@@ -98,7 +99,7 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG,
MVT ObjectVT = getValueType(I->getType());
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -251,7 +252,7 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
unsigned ArgsSize = 0;
for (unsigned i = 0, e = TheCall->getNumArgs(); i != e; ++i) {
switch (TheCall->getArg(i).getValueType().getSimpleVT()) {
- default: assert(0 && "Unknown value type!");
+ default: LLVM_UNREACHABLE("Unknown value type!");
case MVT::i1:
case MVT::i8:
case MVT::i16:
@@ -289,7 +290,7 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: assert(0 && "Unknown loc info!");
+ default: LLVM_UNREACHABLE("Unknown loc info!");
case CCValAssign::Full: break;
case CCValAssign::SExt:
Arg = DAG.getNode(ISD::SIGN_EXTEND, VA.getLocVT(), Arg);
@@ -331,7 +332,7 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
SDValue ValToStore(0, 0);
unsigned ObjSize;
switch (ObjectVT.getSimpleVT()) {
- default: assert(0 && "Unhandled argument type!");
+ default: LLVM_UNREACHABLE("Unhandled argument type!");
case MVT::i32:
ObjSize = 4;
@@ -497,7 +498,7 @@ static SDValue LowerCALL(SDValue Op, SelectionDAG &DAG) {
/// condition.
static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown integer condition code!");
+ default: LLVM_UNREACHABLE("Unknown integer condition code!");
case ISD::SETEQ: return SPCC::ICC_E;
case ISD::SETNE: return SPCC::ICC_NE;
case ISD::SETLT: return SPCC::ICC_L;
@@ -515,7 +516,7 @@ static SPCC::CondCodes IntCondCCodeToICC(ISD::CondCode CC) {
/// FCC condition.
static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: assert(0 && "Unknown fp condition code!");
+ default: LLVM_UNREACHABLE("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return SPCC::FCC_E;
case ISD::SETNE:
@@ -901,12 +902,12 @@ static SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) {
SDValue SparcTargetLowering::
LowerOperation(SDValue Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
- default: assert(0 && "Should not custom lower this!");
+ default: LLVM_UNREACHABLE("Should not custom lower this!");
// Frame & Return address. Currently unimplemented
case ISD::RETURNADDR: return SDValue();
case ISD::FRAMEADDR: return SDValue();
case ISD::GlobalTLSAddress:
- assert(0 && "TLS not implemented for Sparc.");
+ LLVM_UNREACHABLE("TLS not implemented for Sparc.");
case ISD::GlobalAddress: return LowerGLOBALADDRESS(Op, DAG);
case ISD::ConstantPool: return LowerCONSTANTPOOL(Op, DAG);
case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG);
@@ -930,7 +931,7 @@ SparcTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
DebugLoc dl = MI->getDebugLoc();
// Figure out the conditional branch opcode to use for this select_cc.
switch (MI->getOpcode()) {
- default: assert(0 && "Unknown SELECT_CC!");
+ default: LLVM_UNREACHABLE("Unknown SELECT_CC!");
case SP::SELECT_CC_Int_ICC:
case SP::SELECT_CC_FP_ICC:
case SP::SELECT_CC_DFP_ICC: