aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/Mips
diff options
context:
space:
mode:
Diffstat (limited to 'lib/Target/Mips')
-rw-r--r--lib/Target/Mips/MipsAsmPrinter.cpp4
-rw-r--r--lib/Target/Mips/MipsInstrInfo.cpp2
-rw-r--r--lib/Target/Mips/MipsRegisterInfo.cpp4
3 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp
index 0e901a069b..e15f04e42b 100644
--- a/lib/Target/Mips/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/MipsAsmPrinter.cpp
@@ -374,9 +374,9 @@ printOperand(const MachineInstr *MI, int opNum)
case MachineOperand::MO_Immediate:
if ((MI->getOpcode() == Mips::SLTiu) || (MI->getOpcode() == Mips::ORi) ||
(MI->getOpcode() == Mips::LUi) || (MI->getOpcode() == Mips::ANDi))
- O << (unsigned short int)MO.getImmedValue();
+ O << (unsigned short int)MO.getImm();
else
- O << (short int)MO.getImmedValue();
+ O << (short int)MO.getImm();
break;
case MachineOperand::MO_MachineBasicBlock:
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index c3c4ef47bc..bb8a5c697c 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -25,7 +25,7 @@ MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm)
TM(tm), RI(*this) {}
static bool isZeroImm(const MachineOperand &op) {
- return op.isImmediate() && op.getImmedValue() == 0;
+ return op.isImmediate() && op.getImm() == 0;
}
/// Return true if the instruction is a register to register move and
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 5220f598c9..c04b4c7246 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -109,7 +109,7 @@ void MipsRegisterInfo::storeRegToAddr(MachineFunction &MF, unsigned SrcReg,
if (MO.isRegister())
MIB.addReg(MO.getReg());
else if (MO.isImmediate())
- MIB.addImm(MO.getImmedValue());
+ MIB.addImm(MO.getImm());
else
MIB.addFrameIndex(MO.getFrameIndex());
}
@@ -140,7 +140,7 @@ void MipsRegisterInfo::loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
if (MO.isRegister())
MIB.addReg(MO.getReg());
else if (MO.isImmediate())
- MIB.addImm(MO.getImmedValue());
+ MIB.addImm(MO.getImm());
else
MIB.addFrameIndex(MO.getFrameIndex());
}