1 files changed, 6 insertions, 8 deletions
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index ad022311ed..858723bad9 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -117,18 +117,16 @@ TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
 
 // Install an instruction selector pass using
 // the ISelDag to gen Mips code.
-bool MipsPassConfig::addInstSelector()
-{
-  PM.add(createMipsISelDag(getMipsTargetMachine()));
+bool MipsPassConfig::addInstSelector() {
+  PM->add(createMipsISelDag(getMipsTargetMachine()));
   return false;
 }
 
 // Implemented by targets that want to run passes immediately before
 // machine code is emitted. return true if -print-machineinstrs should
 // print out the code after the passes.
-bool MipsPassConfig::addPreEmitPass()
-{
-  PM.add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
+bool MipsPassConfig::addPreEmitPass() {
+  PM->add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
   return true;
 }
 
@@ -136,12 +134,12 @@ bool MipsPassConfig::addPreRegAlloc() {
   // Do not restore $gp if target is Mips64.
   // In N32/64, $gp is a callee-saved register.
   if (!getMipsSubtarget().hasMips64())
-    PM.add(createMipsEmitGPRestorePass(getMipsTargetMachine()));
+    PM->add(createMipsEmitGPRestorePass(getMipsTargetMachine()));
   return true;
 }
 
 bool MipsPassConfig::addPreSched2() {
-  PM.add(createMipsExpandPseudoPass(getMipsTargetMachine()));
+  PM->add(createMipsExpandPseudoPass(getMipsTargetMachine()));
   return true;
 }