diff options
Diffstat (limited to 'lib/Target/Alpha')
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 11 | ||||
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.h | 6 |
2 files changed, 9 insertions, 8 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp index a602770eca..ec8857fc7f 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.cpp +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -100,9 +100,10 @@ static bool isAlphaIntCondCode(unsigned Opcode) { } } -unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, - MachineBasicBlock *FBB, - const std::vector<MachineOperand> &Cond)const{ +unsigned AlphaInstrInfo::InsertBranch(MachineBasicBlock &MBB, + MachineBasicBlock *TBB, + MachineBasicBlock *FBB, + const SmallVectorImpl<MachineOperand> &Cond) const { assert(TBB && "InsertBranch must not be told to insert a fallthrough"); assert((Cond.size() == 2 || Cond.size() == 0) && "Alpha branch conditions have two components!"); @@ -315,7 +316,7 @@ static unsigned AlphaRevCondCode(unsigned Opcode) { // Branch analysis. bool AlphaInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - std::vector<MachineOperand> &Cond) const { + SmallVectorImpl<MachineOperand> &Cond) const { // If the block has no terminators, it just falls into the block after it. MachineBasicBlock::iterator I = MBB.end(); if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) @@ -418,7 +419,7 @@ bool AlphaInstrInfo::BlockHasNoFallThrough(MachineBasicBlock &MBB) const { } } bool AlphaInstrInfo:: -ReverseBranchCondition(std::vector<MachineOperand> &Cond) const { +ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { assert(Cond.size() == 2 && "Invalid Alpha branch opcode!"); Cond[0].setImm(AlphaRevCondCode(Cond[0].getImm())); return false; diff --git a/lib/Target/Alpha/AlphaInstrInfo.h b/lib/Target/Alpha/AlphaInstrInfo.h index 063eb0c218..ccfa429b8a 100644 --- a/lib/Target/Alpha/AlphaInstrInfo.h +++ b/lib/Target/Alpha/AlphaInstrInfo.h @@ -41,7 +41,7 @@ public: virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, - const std::vector<MachineOperand> &Cond) const; + const SmallVectorImpl<MachineOperand> &Cond) const; virtual void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, @@ -81,12 +81,12 @@ public: bool AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, - std::vector<MachineOperand> &Cond) const; + SmallVectorImpl<MachineOperand> &Cond) const; unsigned RemoveBranch(MachineBasicBlock &MBB) const; void insertNoop(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const; bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const; - bool ReverseBranchCondition(std::vector<MachineOperand> &Cond) const; + bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const; }; } |