diff options
Diffstat (limited to 'lib/Target/Alpha/AlphaInstrInfo.cpp')
| -rw-r--r-- | lib/Target/Alpha/AlphaInstrInfo.cpp | 43 | 
1 files changed, 43 insertions, 0 deletions
diff --git a/lib/Target/Alpha/AlphaInstrInfo.cpp b/lib/Target/Alpha/AlphaInstrInfo.cpp new file mode 100644 index 0000000000..3ca0ebd42a --- /dev/null +++ b/lib/Target/Alpha/AlphaInstrInfo.cpp @@ -0,0 +1,43 @@ +//===- AlphaInstrInfo.cpp - Alpha Instruction Information ---*- C++ -*-===// +//  +//                     The LLVM Compiler Infrastructure +// +// This file was developed by the LLVM research group and is distributed under +// the University of Illinois Open Source License. See LICENSE.TXT for details. +//  +//===----------------------------------------------------------------------===// +// +// This file contains the Alpha implementation of the TargetInstrInfo class. +// +//===----------------------------------------------------------------------===// + +#include "Alpha.h" +#include "AlphaInstrInfo.h" +#include "AlphaGenInstrInfo.inc" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include <iostream> +using namespace llvm; + +AlphaInstrInfo::AlphaInstrInfo() +  : TargetInstrInfo(AlphaInsts, sizeof(AlphaInsts)/sizeof(AlphaInsts[0])) { } + + +bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI, +                                 unsigned& sourceReg, +                                 unsigned& destReg) const { +  //assert(0 && "TODO"); +  MachineOpCode oc = MI.getOpcode(); +  if (oc == Alpha::BIS) {  // or r1, r2, r2 +    assert(MI.getNumOperands() == 3 && +           MI.getOperand(0).isRegister() && +           MI.getOperand(1).isRegister() && +           MI.getOperand(2).isRegister() && +           "invalid Alpha BIS instruction!"); +    if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) { +      sourceReg = MI.getOperand(1).getReg(); +      destReg = MI.getOperand(0).getReg(); +      return true; +    } +  } +  return false; +}  | 
