aboutsummaryrefslogtreecommitdiff
path: root/lib/Target/ARM
diff options
context:
space:
mode:
Diffstat (limited to 'lib/Target/ARM')
-rw-r--r--lib/Target/ARM/ARMInstrVFP.td8
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassembler.cpp8
2 files changed, 8 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARMInstrVFP.td b/lib/Target/ARM/ARMInstrVFP.td
index 4e2cda433b..23c132e4f6 100644
--- a/lib/Target/ARM/ARMInstrVFP.td
+++ b/lib/Target/ARM/ARMInstrVFP.td
@@ -567,8 +567,8 @@ def VMOVRRS : AVConv3I<0b11000101, 0b1010,
bits<4> Rt2;
// Encode instruction operands.
- let Inst{3-0} = src1{3-0};
- let Inst{5} = src1{4};
+ let Inst{3-0} = src1{4-1};
+ let Inst{5} = src1{0};
let Inst{15-12} = Rt;
let Inst{19-16} = Rt2;
@@ -617,8 +617,8 @@ def VMOVSRR : AVConv5I<0b11000100, 0b1010,
bits<4> src2;
// Encode instruction operands.
- let Inst{3-0} = dst1{3-0};
- let Inst{5} = dst1{4};
+ let Inst{3-0} = dst1{4-1};
+ let Inst{5} = dst1{0};
let Inst{15-12} = src1;
let Inst{19-16} = src2;
diff --git a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 66ea1171ff..8164e90d0a 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -4198,9 +4198,9 @@ static DecodeStatus DecodeVMOVSRR(MCInst &Inst, unsigned Insn,
DecodeStatus S = MCDisassembler::Success;
unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4);
- unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
+ unsigned Rm = fieldFromInstruction32(Insn, 5, 1);
unsigned pred = fieldFromInstruction32(Insn, 28, 4);
- Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
+ Rm |= fieldFromInstruction32(Insn, 0, 4) << 4;
if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F)
S = MCDisassembler::SoftFail;
@@ -4224,9 +4224,9 @@ static DecodeStatus DecodeVMOVRRS(MCInst &Inst, unsigned Insn,
DecodeStatus S = MCDisassembler::Success;
unsigned Rt = fieldFromInstruction32(Insn, 12, 4);
unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4);
- unsigned Rm = fieldFromInstruction32(Insn, 0, 4);
+ unsigned Rm = fieldFromInstruction32(Insn, 5, 1);
unsigned pred = fieldFromInstruction32(Insn, 28, 4);
- Rm |= fieldFromInstruction32(Insn, 5, 1) << 4;
+ Rm |= fieldFromInstruction32(Insn, 0, 4) << 4;
if (Rt == 0xF || Rt2 == 0xF || Rm == 0x1F)
S = MCDisassembler::SoftFail;