diff options
Diffstat (limited to 'lib/Target/ARM/AsmParser/ARMAsmParser.cpp')
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3e768f2531..31300aea56 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -24,6 +24,7 @@ #include "llvm/Target/TargetRegistry.h" #include "llvm/Support/SourceMgr.h" #include "llvm/Support/raw_ostream.h" +#include "llvm/ADT/BitVector.h" #include "llvm/ADT/OwningPtr.h" #include "llvm/ADT/STLExtras.h" #include "llvm/ADT/SmallVector.h" @@ -1661,17 +1662,11 @@ parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { Parser.Lex(); // Eat right curly brace token. // Verify the register list. - SmallVectorImpl<std::pair<unsigned, SMLoc> >::const_iterator - RI = Registers.begin(), RE = Registers.end(); - - unsigned HighRegNum = getARMRegisterNumbering(RI->first); bool EmittedWarning = false; - - DenseMap<unsigned, bool> RegMap; - RegMap[HighRegNum] = true; - - for (++RI; RI != RE; ++RI) { - const std::pair<unsigned, SMLoc> &RegInfo = *RI; + unsigned HighRegNum = 0; + BitVector RegMap(32); + for (unsigned i = 0, e = Registers.size(); i != e; ++i) { + const std::pair<unsigned, SMLoc> &RegInfo = Registers[i]; unsigned Reg = getARMRegisterNumbering(RegInfo.first); if (RegMap[Reg]) { @@ -1683,7 +1678,7 @@ parseRegisterList(SmallVectorImpl<MCParsedAsmOperand*> &Operands) { Warning(RegInfo.second, "register not in ascending order in register list"); - RegMap[Reg] = true; + RegMap.set(Reg); HighRegNum = std::max(Reg, HighRegNum); } |