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-rw-r--r--lib/Target/ARM/ARM.td18
1 files changed, 10 insertions, 8 deletions
diff --git a/lib/Target/ARM/ARM.td b/lib/Target/ARM/ARM.td
index cb9bd6a094..70338612d9 100644
--- a/lib/Target/ARM/ARM.td
+++ b/lib/Target/ARM/ARM.td
@@ -89,16 +89,18 @@ def : ProcNoItin<"xscale", [ArchV5TE]>;
def : ProcNoItin<"iwmmxt", [ArchV5TE]>;
// V6 Processors.
-def : ProcNoItin<"arm1136j-s", [ArchV6]>;
-def : ProcNoItin<"arm1136jf-s", [ArchV6, FeatureVFP2]>;
-def : ProcNoItin<"arm1176jz-s", [ArchV6]>;
-def : ProcNoItin<"arm1176jzf-s", [ArchV6, FeatureVFP2]>;
-def : ProcNoItin<"mpcorenovfp", [ArchV6]>;
-def : ProcNoItin<"mpcore", [ArchV6, FeatureVFP2]>;
+def : Processor<"arm1136j-s", ARMV6Itineraries, [ArchV6]>;
+def : Processor<"arm1136jf-s", ARMV6Itineraries, [ArchV6, FeatureVFP2]>;
+def : Processor<"arm1176jz-s", ARMV6Itineraries, [ArchV6]>;
+def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ArchV6, FeatureVFP2]>;
+def : Processor<"mpcorenovfp", ARMV6Itineraries, [ArchV6]>;
+def : Processor<"mpcore", ARMV6Itineraries, [ArchV6, FeatureVFP2]>;
// V6T2 Processors.
-def : ProcNoItin<"arm1156t2-s", [ArchV6T2, FeatureThumb2]>;
-def : ProcNoItin<"arm1156t2f-s", [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
+def : Processor<"arm1156t2-s", ARMV6Itineraries,
+ [ArchV6T2, FeatureThumb2]>;
+def : Processor<"arm1156t2f-s", ARMV6Itineraries,
+ [ArchV6T2, FeatureThumb2, FeatureVFP2]>;
// V7 Processors.
def : Processor<"cortex-a8", CortexA8Itineraries,