diff options
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 18 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 |
2 files changed, 15 insertions, 7 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 98908765b7..bdcad0a3b5 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3308,16 +3308,20 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) { switch (Node->getOpcode()) { case ISD::UDIV: case ISD::SDIV: - if (VT == MVT::i32) { - LC = Node->getOpcode() == ISD::UDIV - ? RTLIB::UDIV_I32 : RTLIB::SDIV_I32; - isSigned = Node->getOpcode() == ISD::SDIV; - } - break; + isSigned = Node->getOpcode() == ISD::SDIV; + if (VT == MVT::i16) + LC = (isSigned ? RTLIB::SDIV_I16 : RTLIB::UDIV_I16); + else if (VT == MVT::i32) + LC = (isSigned ? RTLIB::SDIV_I32 : RTLIB::UDIV_I32); + else if (VT == MVT::i64) + LC = (isSigned ? RTLIB::SDIV_I64 : RTLIB::UDIV_I64); + else if (VT == MVT::i128) + LC = (isSigned ? RTLIB::SDIV_I128 : RTLIB::UDIV_I128); + break; case ISD::MUL: if (VT == MVT::i16) LC = RTLIB::MUL_I16; - if (VT == MVT::i32) + else if (VT == MVT::i32) LC = RTLIB::MUL_I32; else if (VT == MVT::i64) LC = RTLIB::MUL_I64; diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 959274789c..8eb4de4655 100644 --- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -67,15 +67,19 @@ static void InitLibcallNames(const char **Names) { Names[RTLIB::MUL_I32] = "__mulsi3"; Names[RTLIB::MUL_I64] = "__muldi3"; Names[RTLIB::MUL_I128] = "__multi3"; + Names[RTLIB::SDIV_I16] = "__divhi3"; Names[RTLIB::SDIV_I32] = "__divsi3"; Names[RTLIB::SDIV_I64] = "__divdi3"; Names[RTLIB::SDIV_I128] = "__divti3"; + Names[RTLIB::UDIV_I32] = "__udivhi3"; Names[RTLIB::UDIV_I32] = "__udivsi3"; Names[RTLIB::UDIV_I64] = "__udivdi3"; Names[RTLIB::UDIV_I128] = "__udivti3"; + Names[RTLIB::SREM_I16] = "__modhi3"; Names[RTLIB::SREM_I32] = "__modsi3"; Names[RTLIB::SREM_I64] = "__moddi3"; Names[RTLIB::SREM_I128] = "__modti3"; + Names[RTLIB::UREM_I16] = "__umodsi3"; Names[RTLIB::UREM_I32] = "__umodsi3"; Names[RTLIB::UREM_I64] = "__umoddi3"; Names[RTLIB::UREM_I128] = "__umodti3"; |