diff options
Diffstat (limited to 'lib/CodeGen')
| -rw-r--r-- | lib/CodeGen/RegisterScavenging.cpp | 3 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp index 1d9effb110..e8329781ac 100644 --- a/lib/CodeGen/RegisterScavenging.cpp +++ b/lib/CodeGen/RegisterScavenging.cpp @@ -37,11 +37,12 @@ static bool RedefinesSuperRegPart(const MachineInstr *MI, unsigned SubReg, const MachineOperand &MO = MI->getOperand(i); if (!MO.isRegister()) continue; - if (TRI->isSuperRegister(SubReg, MO.getReg())) + if (TRI->isSuperRegister(SubReg, MO.getReg())) { if (MO.isUse()) SeenSuperUse = true; else if (MO.isImplicit()) SeenSuperDef = true; + } } return SeenSuperDef && SeenSuperUse; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index ff505f2c0d..44c72b6bec 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2986,7 +2986,7 @@ SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, } bool Indexed = AM != ISD::UNINDEXED; - assert(Indexed || Offset.getOpcode() == ISD::UNDEF && + assert((Indexed || Offset.getOpcode() == ISD::UNDEF) && "Unindexed load with an offset!"); SDVTList VTs = Indexed ? |