diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp index 7ddf8c0104..61e279c046 100644 --- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp +++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp @@ -927,6 +927,22 @@ void PPCDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) { switch (N->getOpcode()) { default: break; + case ISD::VECTOR_SHUFFLE: + // FIXME: This should be autogenerated from the .td file, it is here for now + // due to bugs in tblgen. + if (Op.getOperand(1).getOpcode() == ISD::UNDEF && + (Op.getValueType() == MVT::v4f32 || Op.getValueType() == MVT::v4i32) && + PPC::isSplatShuffleMask(Op.getOperand(2).Val)) { + SDOperand N0; + Select(N0, N->getOperand(0)); + Result = CodeGenMap[Op] = + SDOperand(CurDAG->getTargetNode(PPC::VSPLTW, MVT::v4f32, + getI32Imm(PPC::getVSPLTImmediate(Op.getOperand(2).Val)), + N0), 0); + return; + } + assert(0 && "ILLEGAL VECTOR_SHUFFLE!"); + case ISD::SETCC: Result = SelectSETCC(Op); return; |