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-rw-r--r--lib/Target/ARM/ARMISelDAGToDAG.cpp4
-rw-r--r--lib/Target/Alpha/AlphaISelDAGToDAG.cpp5
-rw-r--r--lib/Target/IA64/IA64ISelDAGToDAG.cpp3
-rw-r--r--lib/Target/Mips/MipsISelDAGToDAG.cpp9
-rw-r--r--lib/Target/PIC16/PIC16ISelDAGToDAG.cpp8
-rw-r--r--lib/Target/PowerPC/PPCISelDAGToDAG.cpp4
-rw-r--r--lib/Target/Sparc/Sparc.h3
-rw-r--r--lib/Target/Sparc/SparcISelDAGToDAG.cpp8
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.cpp2
-rw-r--r--lib/Target/Sparc/SparcTargetMachine.h5
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp4
11 files changed, 22 insertions, 33 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 46b9a19376..560be0ad96 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -39,15 +39,13 @@ namespace {
class ARMDAGToDAGISel : public SelectionDAGISel {
ARMTargetMachine &TM;
- ARMTargetLowering ARMLowering;
-
/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
/// make the right decision when generating code for different targets.
const ARMSubtarget *Subtarget;
public:
explicit ARMDAGToDAGISel(ARMTargetMachine &tm)
- : SelectionDAGISel(ARMLowering), TM(tm), ARMLowering(tm),
+ : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
Subtarget(&TM.getSubtarget<ARMSubtarget>()) {
}
diff --git a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
index 8b298db243..07a0ae2ba9 100644
--- a/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
+++ b/lib/Target/Alpha/AlphaISelDAGToDAG.cpp
@@ -40,8 +40,6 @@ namespace {
/// AlphaDAGToDAGISel - Alpha specific code to select Alpha machine
/// instructions for SelectionDAG operations.
class AlphaDAGToDAGISel : public SelectionDAGISel {
- AlphaTargetLowering AlphaLowering;
-
static const int64_t IMM_LOW = -32768;
static const int64_t IMM_HIGH = 32767;
static const int64_t IMM_MULT = 65536;
@@ -147,8 +145,7 @@ namespace {
public:
explicit AlphaDAGToDAGISel(AlphaTargetMachine &TM)
- : SelectionDAGISel(AlphaLowering),
- AlphaLowering(*TM.getTargetLowering())
+ : SelectionDAGISel(*TM.getTargetLowering())
{}
/// getI64Imm - Return a target constant with the specified value, of type
diff --git a/lib/Target/IA64/IA64ISelDAGToDAG.cpp b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
index f79496db77..18b9ecf94e 100644
--- a/lib/Target/IA64/IA64ISelDAGToDAG.cpp
+++ b/lib/Target/IA64/IA64ISelDAGToDAG.cpp
@@ -37,11 +37,10 @@ namespace {
/// instructions for SelectionDAG operations.
///
class IA64DAGToDAGISel : public SelectionDAGISel {
- IA64TargetLowering IA64Lowering;
unsigned GlobalBaseReg;
public:
explicit IA64DAGToDAGISel(IA64TargetMachine &TM)
- : SelectionDAGISel(IA64Lowering), IA64Lowering(*TM.getTargetLowering()) {}
+ : SelectionDAGISel(*TM.getTargetLowering()) {}
virtual bool runOnFunction(Function &Fn) {
// Make sure we re-emit a set of the global base reg if necessary
diff --git a/lib/Target/Mips/MipsISelDAGToDAG.cpp b/lib/Target/Mips/MipsISelDAGToDAG.cpp
index a408a9623c..669f62f9f1 100644
--- a/lib/Target/Mips/MipsISelDAGToDAG.cpp
+++ b/lib/Target/Mips/MipsISelDAGToDAG.cpp
@@ -52,19 +52,14 @@ class VISIBILITY_HIDDEN MipsDAGToDAGISel : public SelectionDAGISel {
/// TM - Keep a reference to MipsTargetMachine.
MipsTargetMachine &TM;
- /// MipsLowering - This object fully describes how to lower LLVM code to an
- /// Mips-specific SelectionDAG.
- MipsTargetLowering MipsLowering;
-
/// Subtarget - Keep a pointer to the MipsSubtarget around so that we can
/// make the right decision when generating code for different targets.
const MipsSubtarget &Subtarget;
public:
explicit MipsDAGToDAGISel(MipsTargetMachine &tm) :
- SelectionDAGISel(MipsLowering),
- TM(tm), MipsLowering(*TM.getTargetLowering()),
- Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
+ SelectionDAGISel(*tm.getTargetLowering()),
+ TM(tm), Subtarget(tm.getSubtarget<MipsSubtarget>()) {}
virtual void InstructionSelect();
diff --git a/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp b/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
index 3fc7c72a61..285c5a6355 100644
--- a/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
+++ b/lib/Target/PIC16/PIC16ISelDAGToDAG.cpp
@@ -51,14 +51,10 @@ class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
/// TM - Keep a reference to PIC16TargetMachine.
PIC16TargetMachine &TM;
- /// PIC16Lowering - This object fully describes how to lower LLVM code to an
- /// PIC16-specific SelectionDAG.
- PIC16TargetLowering PIC16Lowering;
-
public:
explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
- SelectionDAGISel(PIC16Lowering),
- TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
+ SelectionDAGISel(*tm.getTargetLowering()),
+ TM(tm) {}
virtual void InstructionSelect();
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 6b2ec4a890..56d6a58591 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -41,12 +41,12 @@ namespace {
///
class VISIBILITY_HIDDEN PPCDAGToDAGISel : public SelectionDAGISel {
PPCTargetMachine &TM;
- PPCTargetLowering PPCLowering;
+ PPCTargetLowering &PPCLowering;
const PPCSubtarget &PPCSubTarget;
unsigned GlobalBaseReg;
public:
explicit PPCDAGToDAGISel(PPCTargetMachine &tm)
- : SelectionDAGISel(PPCLowering), TM(tm),
+ : SelectionDAGISel(*tm.getTargetLowering()), TM(tm),
PPCLowering(*TM.getTargetLowering()),
PPCSubTarget(*TM.getSubtargetImpl()) {}
diff --git a/lib/Target/Sparc/Sparc.h b/lib/Target/Sparc/Sparc.h
index 4f02ab87d4..1096144e87 100644
--- a/lib/Target/Sparc/Sparc.h
+++ b/lib/Target/Sparc/Sparc.h
@@ -21,9 +21,10 @@
namespace llvm {
class FunctionPass;
class TargetMachine;
+ class SparcTargetMachine;
class raw_ostream;
- FunctionPass *createSparcISelDag(TargetMachine &TM);
+ FunctionPass *createSparcISelDag(SparcTargetMachine &TM);
FunctionPass *createSparcCodePrinterPass(raw_ostream &OS, TargetMachine &TM);
FunctionPass *createSparcDelaySlotFillerPass(TargetMachine &TM);
FunctionPass *createSparcFPMoverPass(TargetMachine &TM);
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 4a3ca7fa06..d7aa08f8ca 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -29,14 +29,12 @@ using namespace llvm;
///
namespace {
class SparcDAGToDAGISel : public SelectionDAGISel {
- SparcTargetLowering Lowering;
-
/// Subtarget - Keep a pointer to the Sparc Subtarget around so that we can
/// make the right decision when generating code for different targets.
const SparcSubtarget &Subtarget;
public:
- explicit SparcDAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(Lowering), Lowering(TM),
+ explicit SparcDAGToDAGISel(SparcTargetMachine &TM)
+ : SelectionDAGISel(*TM.getTargetLowering()),
Subtarget(TM.getSubtarget<SparcSubtarget>()) {
}
@@ -189,6 +187,6 @@ SDNode *SparcDAGToDAGISel::Select(SDValue Op) {
/// createSparcISelDag - This pass converts a legalized DAG into a
/// SPARC-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createSparcISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createSparcISelDag(SparcTargetMachine &TM) {
return new SparcDAGToDAGISel(TM);
}
diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp
index e0ab42edda..cc730f8267 100644
--- a/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -30,7 +30,7 @@ const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
///
SparcTargetMachine::SparcTargetMachine(const Module &M, const std::string &FS)
: DataLayout("E-p:32:32-f128:128:128"),
- Subtarget(M, FS), InstrInfo(Subtarget),
+ Subtarget(M, FS), TLInfo(*this), InstrInfo(Subtarget),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
diff --git a/lib/Target/Sparc/SparcTargetMachine.h b/lib/Target/Sparc/SparcTargetMachine.h
index d7c383787e..eca5f28a80 100644
--- a/lib/Target/Sparc/SparcTargetMachine.h
+++ b/lib/Target/Sparc/SparcTargetMachine.h
@@ -19,6 +19,7 @@
#include "llvm/Target/TargetFrameInfo.h"
#include "SparcInstrInfo.h"
#include "SparcSubtarget.h"
+#include "SparcISelLowering.h"
namespace llvm {
@@ -27,6 +28,7 @@ class Module;
class SparcTargetMachine : public LLVMTargetMachine {
const TargetData DataLayout; // Calculates type size & alignment
SparcSubtarget Subtarget;
+ SparcTargetLowering TLInfo;
SparcInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
@@ -42,6 +44,9 @@ public:
virtual const SparcRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
+ virtual SparcTargetLowering* getTargetLowering() const {
+ return const_cast<SparcTargetLowering*>(&TLInfo);
+ }
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 06dfc21d07..35c5b42243 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -113,7 +113,7 @@ namespace {
/// X86Lowering - This object fully describes how to lower LLVM code to an
/// X86-specific SelectionDAG.
- X86TargetLowering X86Lowering;
+ X86TargetLowering &X86Lowering;
/// Subtarget - Keep a pointer to the X86Subtarget around so that we can
/// make the right decision when generating code for different targets.
@@ -129,7 +129,7 @@ namespace {
public:
X86DAGToDAGISel(X86TargetMachine &tm, bool fast)
- : SelectionDAGISel(X86Lowering, fast),
+ : SelectionDAGISel(*tm.getTargetLowering(), fast),
TM(tm), X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
OptForSize(false) {}
generated by cgit v1.2.3-18-g5258 (git 2.32.0) at 2025-06-29 18:35:17 +0000