diff options
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 17 | ||||
| -rw-r--r-- | lib/Target/X86/X86PeepholeOpt.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 2 |
3 files changed, 24 insertions, 3 deletions
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index 2c5121a270..d0c876fe1a 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -966,19 +966,34 @@ let isTwoAddress = 0 in { } def SBB32rr : I<0x19, MRMDestReg, (ops R32:$dst, R32:$src1, R32:$src2), - "adc{l} {$src2, $dst|$dst, $src2}">; + "sbb{l} {$src2, $dst|$dst, $src2}">; + let isTwoAddress = 0 in { def SBB32mr : I<0x19, MRMDestMem, (ops i32mem:$dst, R32:$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; + def SBB8mi : Ii32<0x80, MRM3m, (ops i8mem:$dst, i8imm:$src2), + "sbb{b} {$src2, $dst|$dst, $src2}">; + def SBB16mi : Ii32<0x81, MRM3m, (ops i16mem:$dst, i16imm:$src2), + "sbb{w} {$src2, $dst|$dst, $src2}">, OpSize; def SBB32mi : Ii32<0x81, MRM3m, (ops i32mem:$dst, i32imm:$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; + def SBB16mi8 : Ii8<0x83, MRM3m, (ops i16mem:$dst, i8imm :$src2), + "sbb{w} {$src2, $dst|$dst, $src2}">, OpSize; def SBB32mi8 : Ii8<0x83, MRM3m, (ops i32mem:$dst, i8imm :$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; } +def SBB8ri : Ii8<0x80, MRM3r, (ops R8:$dst, R8:$src1, i8imm:$src2), + "sbb{b} {$src2, $dst|$dst, $src2}">; +def SBB16ri : Ii16<0x81, MRM3r, (ops R16:$dst, R16:$src1, i16imm:$src2), + "sbb{w} {$src2, $dst|$dst, $src2}">, OpSize; + def SBB32rm : I<0x1B, MRMSrcMem, (ops R32:$dst, R32:$src1, i32mem:$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; def SBB32ri : Ii32<0x81, MRM3r, (ops R32:$dst, R32:$src1, i32imm:$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; + +def SBB16ri8 : Ii16<0x83, MRM3r, (ops R16:$dst, R16:$src1, i8imm:$src2), + "sbb{w} {$src2, $dst|$dst, $src2}">, OpSize; def SBB32ri8 : Ii8<0x83, MRM3r, (ops R32:$dst, R32:$src1, i8imm:$src2), "sbb{l} {$src2, $dst|$dst, $src2}">; diff --git a/lib/Target/X86/X86PeepholeOpt.cpp b/lib/Target/X86/X86PeepholeOpt.cpp index f03e339d2a..d0414809f5 100644 --- a/lib/Target/X86/X86PeepholeOpt.cpp +++ b/lib/Target/X86/X86PeepholeOpt.cpp @@ -124,7 +124,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, #endif case X86::ADD16ri: case X86::ADD32ri: case X86::ADC32ri: - case X86::SUB16ri: case X86::SUB32ri: case X86::SBB32ri: + case X86::SUB16ri: case X86::SUB32ri: + case X86::SBB16ri: case X86::SBB32ri: case X86::AND16ri: case X86::AND32ri: case X86::OR16ri: case X86::OR32ri: case X86::XOR16ri: case X86::XOR32ri: @@ -141,6 +142,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, case X86::ADC32ri: Opcode = X86::ADC32ri8; break; case X86::SUB16ri: Opcode = X86::SUB16ri8; break; case X86::SUB32ri: Opcode = X86::SUB32ri8; break; + case X86::SBB16ri: Opcode = X86::SBB16ri8; break; case X86::SBB32ri: Opcode = X86::SBB32ri8; break; case X86::AND16ri: Opcode = X86::AND16ri8; break; case X86::AND32ri: Opcode = X86::AND32ri8; break; @@ -159,7 +161,8 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, return false; case X86::ADD16mi: case X86::ADD32mi: case X86::ADC32mi: - case X86::SUB16mi: case X86::SUB32mi: case X86::SBB32mi: + case X86::SUB16mi: case X86::SUB32mi: + case X86::SBB16mi: case X86::SBB32mi: case X86::AND16mi: case X86::AND32mi: case X86::OR16mi: case X86::OR32mi: case X86::XOR16mi: case X86::XOR32mi: @@ -176,6 +179,7 @@ bool PH::PeepholeOptimize(MachineBasicBlock &MBB, case X86::ADC32mi: Opcode = X86::ADC32mi8; break; case X86::SUB16mi: Opcode = X86::SUB16mi8; break; case X86::SUB32mi: Opcode = X86::SUB32mi8; break; + case X86::SBB16mi: Opcode = X86::SBB16mi8; break; case X86::SBB32mi: Opcode = X86::SBB32mi8; break; case X86::AND16mi: Opcode = X86::AND16mi8; break; case X86::AND32mi: Opcode = X86::AND32mi8; break; diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index d78110eb8f..a90e840e28 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -178,6 +178,8 @@ MachineInstr* X86RegisterInfo::foldMemoryOperand(MachineInstr* MI, case X86::SUB16rr: return MakeMRInst(X86::SUB16mr, FrameIndex, MI); case X86::SUB32rr: return MakeMRInst(X86::SUB32mr, FrameIndex, MI); case X86::SBB32rr: return MakeMRInst(X86::SBB32mr, FrameIndex, MI); + case X86::SBB8ri: return MakeMIInst(X86::SBB8mi, FrameIndex, MI); + case X86::SBB16ri: return MakeMIInst(X86::SBB16mi, FrameIndex, MI); case X86::SBB32ri: return MakeMIInst(X86::SBB32mi, FrameIndex, MI); case X86::SUB8ri: return MakeMIInst(X86::SUB8mi , FrameIndex, MI); case X86::SUB16ri: return MakeMIInst(X86::SUB16mi, FrameIndex, MI); |