diff options
| -rw-r--r-- | lib/Target/Alpha/AlphaTargetMachine.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/IA64/IA64TargetMachine.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCTargetMachine.cpp | 6 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcTargetMachine.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 10 |
5 files changed, 0 insertions, 28 deletions
diff --git a/lib/Target/Alpha/AlphaTargetMachine.cpp b/lib/Target/Alpha/AlphaTargetMachine.cpp index 2daaab2d6d..709669ffd7 100644 --- a/lib/Target/Alpha/AlphaTargetMachine.cpp +++ b/lib/Target/Alpha/AlphaTargetMachine.cpp @@ -81,9 +81,6 @@ bool AlphaTargetMachine::addPassesToEmitFile(PassManager &PM, // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); @@ -119,9 +116,6 @@ void AlphaJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); diff --git a/lib/Target/IA64/IA64TargetMachine.cpp b/lib/Target/IA64/IA64TargetMachine.cpp index 4c7af41479..a03bda7e09 100644 --- a/lib/Target/IA64/IA64TargetMachine.cpp +++ b/lib/Target/IA64/IA64TargetMachine.cpp @@ -96,9 +96,6 @@ bool IA64TargetMachine::addPassesToEmitFile(PassManager &PM, PM.add(createLowerInvokePass(704, 16)); // on ia64 linux, jmpbufs are 704 // bytes and must be 16byte aligned - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 60829560a3..94136a4569 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -93,9 +93,6 @@ bool PPCTargetMachine::addPassesToEmitFile(PassManager &PM, // Clean up after other passes, e.g. merging critical edges. if (!Fast) PM.add(createCFGSimplificationPass()); - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); @@ -147,9 +144,6 @@ void PPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // Clean up after other passes, e.g. merging critical edges. PM.add(createCFGSimplificationPass()); - // FIXME: Implement the switch instruction in the instruction selector! - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index 565ccb9bc1..2b56be2cb9 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -72,9 +72,6 @@ bool SparcTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out, // FIXME: implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); - // FIXME: implement the switch instruction in the instruction selector. - PM.add(createLowerSwitchPass()); - // Print LLVM code input to instruction selector: if (PrintMachineCode) PM.add(new PrintFunctionPass()); diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 44877d9b4d..b9dea3bcf3 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -36,8 +36,6 @@ namespace { cl::opt<bool> DisableOutput("disable-x86-llc-output", cl::Hidden, cl::desc("Disable the X86 asm printer, for use " "when profiling the code generator.")); - cl::opt<bool> DisableLowerSwitch("disable-lower-switch", cl::Hidden, - cl::desc("Disable the LowerSwitch pass")); // Register the target. RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)"); } @@ -100,10 +98,6 @@ bool X86TargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out, // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); - // FIXME: Implement the switch instruction in the instruction selector! - if (!DisableLowerSwitch) - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); @@ -169,10 +163,6 @@ void X86JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // FIXME: Implement the invoke/unwind instructions! PM.add(createLowerInvokePass()); - // FIXME: Implement the switch instruction in the instruction selector! - if (!DisableLowerSwitch) - PM.add(createLowerSwitchPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); |