diff options
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 11 | ||||
| -rw-r--r-- | test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll | 16 | ||||
| -rw-r--r-- | test/CodeGen/Mips/inlineasm_constraint.ll | 7 |
3 files changed, 33 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index d056f542e7..3f445a0cc8 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -3042,6 +3042,7 @@ MipsTargetLowering::getSingleConstraintMatchWeight( case 'I': // signed 16 bit immediate case 'J': // integer zero case 'K': // unsigned 16 bit immediate + case 'L': // signed 32 bit immediate where lower 16 bits are 0 if (isa<ConstantInt>(CallOperandVal)) weight = CW_Constant; break; @@ -3124,6 +3125,16 @@ void MipsTargetLowering::LowerAsmOperandForConstraint(SDValue Op, } } return; + case 'L': // signed 32 bit immediate where lower 16 bits are 0 + if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) { + EVT Type = Op.getValueType(); + int64_t Val = C->getSExtValue(); + if ((isInt<32>(Val)) && ((Val & 0xffff) == 0)){ + Result = DAG.getTargetConstant(Val, Type); + break; + } + } + return; } if (Result.getNode()) { diff --git a/test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll new file mode 100644 index 0000000000..49dcc87458 --- /dev/null +++ b/test/CodeGen/Mips/inlineasm-cnstrnt-bad-L.ll @@ -0,0 +1,16 @@ +; +;This is a negative test. The constant value given for the constraint (L) +;is non-zero in the lower 16 bits (0x00100003). +; +; RUN: not llc -march=mipsel < %s 2> %t +; RUN: FileCheck --check-prefix=CHECK-ERRORS < %t %s + +define i32 @main() nounwind { +entry: + +;CHECK-ERRORS: error: invalid operand for inline asm constraint 'L' + + tail call i32 asm "addi $0,$1,$2", "=r,r,L"(i32 7, i32 1048579) nounwind + ret i32 0 +} + diff --git a/test/CodeGen/Mips/inlineasm_constraint.ll b/test/CodeGen/Mips/inlineasm_constraint.ll index 04bd513a68..34d0657e35 100644 --- a/test/CodeGen/Mips/inlineasm_constraint.ll +++ b/test/CodeGen/Mips/inlineasm_constraint.ll @@ -27,6 +27,11 @@ entry: ; CHECK: #NO_APP tail call i16 asm sideeffect "addu $0,$1,$2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind +; Now L with 0x00100000 +; CHECK: #APP +; CHECK: add ${{[0-9]+}},${{[0-9]+}},${{[0-9]+}} +; CHECK: #NO_APP + tail call i32 asm sideeffect "add $0,$1,$3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind + ret i32 0 } - |