diff options
| -rw-r--r-- | test/CodeGen/CellSPU/call_indirect.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/fdiv.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/immed32.ll | 2 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/immed64.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/vec_const.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/vecinsert.ll | 4 |
6 files changed, 10 insertions, 8 deletions
diff --git a/test/CodeGen/CellSPU/call_indirect.ll b/test/CodeGen/CellSPU/call_indirect.ll index f38cba970b..e1924e83eb 100644 --- a/test/CodeGen/CellSPU/call_indirect.ll +++ b/test/CodeGen/CellSPU/call_indirect.ll @@ -11,7 +11,7 @@ ; RUN: grep iohl %t2.s | count 2 ; RUN: grep rotqby %t2.s | count 6 ; RUN: grep lqd %t2.s | count 18 -; RUN: grep il %t2.s | count 2 +; RUN: grep ilhu %t2.s | count 2 ; RUN: grep ai %t2.s | count 9 ; RUN: grep dispatch_tab %t2.s | count 6 diff --git a/test/CodeGen/CellSPU/fdiv.ll b/test/CodeGen/CellSPU/fdiv.ll index 75af90e23f..826a2faaab 100644 --- a/test/CodeGen/CellSPU/fdiv.ll +++ b/test/CodeGen/CellSPU/fdiv.ll @@ -1,6 +1,6 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep frest %t1.s | count 2 -; RUN: grep fi %t1.s | count 2 +; RUN: grep -w fi %t1.s | count 2 ; RUN: grep fm %t1.s | count 4 ; RUN: grep fma %t1.s | count 2 ; RUN: grep fnms %t1.s | count 2 diff --git a/test/CodeGen/CellSPU/immed32.ll b/test/CodeGen/CellSPU/immed32.ll index 2cadfff9dc..bf471b1eb1 100644 --- a/test/CodeGen/CellSPU/immed32.ll +++ b/test/CodeGen/CellSPU/immed32.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep ilhu %t1.s | count 8 ; RUN: grep iohl %t1.s | count 6 -; RUN: grep il %t1.s | count 11 +; RUN: grep -w il %t1.s | count 3 ; RUN: grep 16429 %t1.s | count 1 ; RUN: grep 63572 %t1.s | count 1 ; RUN: grep 128 %t1.s | count 1 diff --git a/test/CodeGen/CellSPU/immed64.ll b/test/CodeGen/CellSPU/immed64.ll index d93322202a..bbda3ff329 100644 --- a/test/CodeGen/CellSPU/immed64.ll +++ b/test/CodeGen/CellSPU/immed64.ll @@ -1,6 +1,8 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: grep lqa %t1.s | count 13 -; RUN: grep il %t1.s | count 22 +; RUN: grep ilhu %t1.s | count 15 +; RUN: grep ila %t1.s | count 1 +; RUN: grep -w il %t1.s | count 6 ; RUN: grep shufb %t1.s | count 13 ; RUN: grep 65520 %t1.s | count 1 ; RUN: grep 43981 %t1.s | count 1 diff --git a/test/CodeGen/CellSPU/vec_const.ll b/test/CodeGen/CellSPU/vec_const.ll index f604100c4c..4b29adc809 100644 --- a/test/CodeGen/CellSPU/vec_const.ll +++ b/test/CodeGen/CellSPU/vec_const.ll @@ -1,8 +1,8 @@ ; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s ; RUN: llvm-as -o - %s | llc -march=cellspu -mattr=large_mem > %t2.s -; RUN: grep il %t1.s | count 16 +; RUN: grep -w il %t1.s | count 3 ; RUN: grep ilhu %t1.s | count 8 -; RUN: grep ilh %t1.s | count 13 +; RUN: grep -w ilh %t1.s | count 5 ; RUN: grep iohl %t1.s | count 7 ; RUN: grep lqa %t1.s | count 6 ; RUN: grep 24672 %t1.s | count 2 diff --git a/test/CodeGen/CellSPU/vecinsert.ll b/test/CodeGen/CellSPU/vecinsert.ll index 726fe3f77c..6abbd9ac79 100644 --- a/test/CodeGen/CellSPU/vecinsert.ll +++ b/test/CodeGen/CellSPU/vecinsert.ll @@ -2,8 +2,8 @@ ; RUN: grep cbd %t1.s | count 5 ; RUN: grep chd %t1.s | count 5 ; RUN: grep cwd %t1.s | count 10 -; RUN: grep il %t1.s | count 15 -; RUN: grep ilh %t1.s | count 10 +; RUN: grep -w il %t1.s | count 5 +; RUN: grep -w ilh %t1.s | count 6 ; RUN: grep iohl %t1.s | count 1 ; RUN: grep ilhu %t1.s | count 4 ; RUN: grep shufb %t1.s | count 26 |