diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCISelPattern.cpp | 4 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 |
2 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index ee794911d6..a21cf5b83e 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -1656,9 +1656,6 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { return Result; case ISD::AND: - // FIXME: should add check in getImmediateForOpcode to return a value - // indicating the immediate is a run of set bits so we can emit a bitfield - // clear with RLWINM instead. switch(getImmediateForOpcode(N.getOperand(1), opcode, Tmp2)) { default: assert(0 && "unhandled result code"); case 0: // No immediate @@ -1690,6 +1687,7 @@ unsigned ISel::SelectExpr(SDOperand N, bool Recording) { Tmp3 = Tmp2 >> 16; // MB Tmp2 &= 0xFFFF; // ME + // FIXME: Catch SHL-AND in addition to SRL-AND in this block. if (N.getOperand(0).getOpcode() == ISD::SRL) if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(N.getOperand(0).getOperand(1))) { diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index 7977a00500..3493fdc02a 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -263,7 +263,7 @@ void PPC32RegisterInfo::emitPrologue(MachineFunction &MF) const { // Update frame info to pretend that this is part of the stack... MFI->setStackSize(NumBytes); - // If , adjust stack pointer: r1 -= numbytes. + // Adjust stack pointer: r1 -= numbytes. if (NumBytes <= 32768) { MI=BuildMI(PPC::STWU,3).addReg(PPC::R1).addSImm(-NumBytes).addReg(PPC::R1); MBB.insert(MBBI, MI); |