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-rw-r--r--lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp1
-rw-r--r--test/MC/ARM/basic-thumb2-instructions.s8
2 files changed, 9 insertions, 0 deletions
diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
index 9117d65dbc..865c3e22b8 100644
--- a/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
+++ b/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
@@ -1277,6 +1277,7 @@ getT2SORegOpValue(const MCInst &MI, unsigned OpIdx,
case ARM_AM::lsl: SBits = 0x0; break;
case ARM_AM::lsr: SBits = 0x2; break;
case ARM_AM::asr: SBits = 0x4; break;
+ case ARM_AM::rrx: // FALLTHROUGH
case ARM_AM::ror: SBits = 0x6; break;
}
diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s
index d7df77735b..8293d4c01c 100644
--- a/test/MC/ARM/basic-thumb2-instructions.s
+++ b/test/MC/ARM/basic-thumb2-instructions.s
@@ -1029,3 +1029,11 @@ _func:
@ CHECK: nopne @ encoding: [0x00,0xbf]
@ CHECK: subne r5, r6, r7 @ encoding: [0xf5,0x1b]
@ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d]
+
+@------------------------------------------------------------------------------
+@ SUB (register)
+@------------------------------------------------------------------------------
+ sub.w r5, r2, r12, rrx
+
+@ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05]
+