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-rw-r--r--lib/Target/SparcV9/SparcV9CodeEmitter.cpp3
1 files changed, 0 insertions, 3 deletions
diff --git a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
index b69408d2ba..495f79171e 100644
--- a/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
+++ b/lib/Target/SparcV9/SparcV9CodeEmitter.cpp
@@ -29,7 +29,6 @@
#include "llvm/CodeGen/MachineFunctionInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetData.h"
#include "Support/Debug.h"
@@ -659,8 +658,6 @@ int64_t SparcV9CodeEmitter::getMachineOpValue(MachineInstr &MI,
}
} else if (MO.isRegister() || MO.getType() == MachineOperand::MO_CCRegister)
{
- assert(MRegisterInfo::isPhysicalRegister(MO.getReg()) &&
- "virtual register in machine code!");
// This is necessary because the Sparc backend doesn't actually lay out
// registers in the real fashion -- it skips those that it chooses not to
// allocate, i.e. those that are the FP, SP, etc.