diff options
| -rw-r--r-- | lib/Target/ARM/ARMISelDAGToDAG.cpp | 10 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2013-03-09-PR15053.ll | 13 |
2 files changed, 17 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp index 5d9d784d96..2c51de23f7 100644 --- a/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -3155,7 +3155,7 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) { cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); // Remap uses. - SDValue Glue = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1); + SDValue OutChain = isThumb ? SDValue(Ld, 2) : SDValue(Ld, 1); if (!SDValue(N, 0).use_empty()) { SDValue Result; if (isThumb) @@ -3163,9 +3163,8 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) { else { SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_0, MVT::i32); SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, - dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue); + dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); Result = SDValue(ResNode,0); - Glue = Result.getValue(1); } ReplaceUses(SDValue(N, 0), Result); } @@ -3176,13 +3175,12 @@ SDNode *ARMDAGToDAGISel::Select(SDNode *N) { else { SDValue SubRegIdx = CurDAG->getTargetConstant(ARM::gsub_1, MVT::i32); SDNode *ResNode = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, - dl, MVT::i32, MVT::Glue, SDValue(Ld, 0), SubRegIdx, Glue); + dl, MVT::i32, SDValue(Ld, 0), SubRegIdx); Result = SDValue(ResNode,0); - Glue = Result.getValue(1); } ReplaceUses(SDValue(N, 1), Result); } - ReplaceUses(SDValue(N, 2), Glue); + ReplaceUses(SDValue(N, 2), OutChain); return NULL; } diff --git a/test/CodeGen/ARM/2013-03-09-PR15053.ll b/test/CodeGen/ARM/2013-03-09-PR15053.ll new file mode 100644 index 0000000000..706a90efe3 --- /dev/null +++ b/test/CodeGen/ARM/2013-03-09-PR15053.ll @@ -0,0 +1,13 @@ +; RUN: llc -mtriple=armv7 < %s +; PR15053 + +declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind +declare { i32, i32 } @llvm.arm.ldrexd(i8*) nounwind readonly + +define void @foo() { +entry: + %0 = tail call { i32, i32 } @llvm.arm.ldrexd(i8* undef) nounwind + %1 = extractvalue { i32, i32 } %0, 0 + %2 = tail call i32 @llvm.arm.strexd(i32 %1, i32 undef, i8* undef) nounwind + ret void +} |