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-rw-r--r--lib/Target/ARM/ARMInstrNEON.td2
-rw-r--r--lib/Target/ARM/ARMScheduleA8.td2
2 files changed, 2 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td
index 93e9e66077..03714343d3 100644
--- a/lib/Target/ARM/ARMInstrNEON.td
+++ b/lib/Target/ARM/ARMInstrNEON.td
@@ -3177,7 +3177,7 @@ def VSHLLi32 : N2VLShMax<1, 1, 0b111010, 0b0011, 0, 0, 0, "vshll", "i32",
v2i64, v2i32, NEONvshlli>;
// VSHRN : Vector Shift Right and Narrow
-defm VSHRN : N2VNSh_HSD<0,1,0b1000,0,0,1, IIC_VMOVN, "vshrn", "i",
+defm VSHRN : N2VNSh_HSD<0,1,0b1000,0,0,1, IIC_VSHLiD, "vshrn", "i",
NEONvshrn>;
// VRSHL : Vector Rounding Shift
diff --git a/lib/Target/ARM/ARMScheduleA8.td b/lib/Target/ARM/ARMScheduleA8.td
index ef93e1da55..915283bd25 100644
--- a/lib/Target/ARM/ARMScheduleA8.td
+++ b/lib/Target/ARM/ARMScheduleA8.td
@@ -531,7 +531,7 @@ def CortexA8Itineraries : ProcessorItineraries<
//
// Vector narrow move
InstrItinData<IIC_VMOVN , [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,
- InstrStage<1, [A8_NPipe]>], [3, 1]>,
+ InstrStage<1, [A8_NPipe]>], [2, 1]>,
//
// Double-register Permute
InstrItinData<IIC_VPERMD, [InstrStage<1, [A8_Pipe0, A8_Pipe1]>,