diff options
37 files changed, 299 insertions, 299 deletions
diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp index 6b4afb7dd8..7abb8d5954 100644 --- a/lib/CodeGen/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter.cpp @@ -148,7 +148,7 @@ static void printAsCString(std::ostream &O, const ConstantArray *CVA) { O << "\""; for (unsigned i = 0; i != CVA->getNumOperands(); ++i) { - unsigned char C = + unsigned char C = (unsigned char)cast<ConstantInt>(CVA->getOperand(i))->getRawValue(); if (C == '"') { @@ -178,7 +178,7 @@ static void printAsCString(std::ostream &O, const ConstantArray *CVA) { /// emitGlobalConstant - Print a general LLVM constant to the .s file. /// -void AsmPrinter::emitGlobalConstant(const Constant *CV) { +void AsmPrinter::emitGlobalConstant(const Constant *CV) { const TargetData &TD = TM.getTargetData(); if (CV->isNullValue() || isa<UndefValue>(CV)) { @@ -253,7 +253,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { int32_t UVal; } U; U.FVal = (float)Val; - + O << Data32bitsDirective << U.UVal << "\t" << CommentString << " float " << Val << "\n"; return; @@ -261,7 +261,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { } else if (CV->getType() == Type::ULongTy || CV->getType() == Type::LongTy) { if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { uint64_t Val = CI->getRawValue(); - + if (Data64bitsDirective) O << Data64bitsDirective << Val << "\n"; else if (TD.isBigEndian()) { @@ -285,7 +285,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { const Type *type = CV->getType(); switch (type->getTypeID()) { - case Type::BoolTyID: + case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID: O << Data8bitsDirective; break; @@ -301,7 +301,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { case Type::UIntTyID: case Type::IntTyID: O << Data32bitsDirective; break; - case Type::ULongTyID: case Type::LongTyID: + case Type::ULongTyID: case Type::LongTyID: assert (0 && "Should have already output double-word constant."); case Type::FloatTyID: case Type::DoubleTyID: assert (0 && "Should have already output floating point constant."); diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index cca9f93553..a4b3b02ea4 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -1,10 +1,10 @@ //===-- BranchFolding.cpp - Fold machine code branch instructions ---------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass forwards branches to unconditional branches to make them branch @@ -158,7 +158,7 @@ bool BranchFolder::OptimizeBlock(MachineFunction::iterator MBB, assert(Br->getNumOperands() == 1 && Br->getOperand(0).isMachineBasicBlock() && "Uncond branch should take one MBB argument!"); MachineBasicBlock *Dest = Br->getOperand(0).getMachineBasicBlock(); - + while (!MBB->pred_empty()) { MachineBasicBlock *Pred = *(MBB->pred_end()-1); ReplaceUsesOfBlockWith(Pred, MBB, Dest, TII); diff --git a/lib/CodeGen/IntrinsicLowering.cpp b/lib/CodeGen/IntrinsicLowering.cpp index b665557d2b..db3c10e7ea 100644 --- a/lib/CodeGen/IntrinsicLowering.cpp +++ b/lib/CodeGen/IntrinsicLowering.cpp @@ -1,10 +1,10 @@ //===-- IntrinsicLowering.cpp - Intrinsic Lowering default implementation -===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements the default intrinsic lowering implementation. @@ -117,7 +117,7 @@ void DefaultIntrinsicLowering::AddPrototypes(Module &M) { void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { Function *Callee = CI->getCalledFunction(); assert(Callee && "Cannot lower an indirect call!"); - + switch (Callee->getIntrinsicID()) { case Intrinsic::not_intrinsic: std::cerr << "Cannot lower a call to a non-intrinsic function '" @@ -140,7 +140,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { CI->replaceAllUsesWith(V); break; } - case Intrinsic::sigsetjmp: + case Intrinsic::sigsetjmp: if (CI->getType() != Type::VoidTy) CI->replaceAllUsesWith(Constant::getNullValue(CI->getType())); break; @@ -163,7 +163,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { case Intrinsic::returnaddress: case Intrinsic::frameaddress: std::cerr << "WARNING: this target does not support the llvm." - << (Callee->getIntrinsicID() == Intrinsic::returnaddress ? + << (Callee->getIntrinsicID() == Intrinsic::returnaddress ? "return" : "frame") << "address intrinsic.\n"; CI->replaceAllUsesWith(ConstantPointerNull::get( cast<PointerType>(CI->getType()))); @@ -220,7 +220,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { break; } } - + assert(CI->use_empty() && "Lowering should have eliminated any uses of the intrinsic call!"); CI->getParent()->getInstList().erase(CI); diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp index a8bc1615b4..ffa4caab06 100644 --- a/lib/CodeGen/LiveInterval.cpp +++ b/lib/CodeGen/LiveInterval.cpp @@ -34,7 +34,7 @@ using namespace llvm; // bool LiveInterval::liveAt(unsigned I) const { Ranges::const_iterator r = std::upper_bound(ranges.begin(), ranges.end(), I); - + if (r == ranges.begin()) return false; @@ -174,7 +174,7 @@ void LiveInterval::extendIntervalEndTo(Ranges::iterator I, unsigned NewEnd) { /// extendIntervalStartTo - This method is used when we want to extend the range /// specified by I to start at the specified endpoint. To do this, we should /// merge and eliminate all ranges that this will overlap with. -LiveInterval::Ranges::iterator +LiveInterval::Ranges::iterator LiveInterval::extendIntervalStartTo(Ranges::iterator I, unsigned NewStart) { assert(I != ranges.end() && "Not a valid interval!"); unsigned ValId = I->ValId; diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index c0d1b2a89f..405d9ec650 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -742,7 +742,7 @@ bool LiveIntervals::differingRegisterClasses(unsigned RegA, // Get the register classes for the first reg. if (MRegisterInfo::isPhysicalRegister(RegA)) { - assert(MRegisterInfo::isVirtualRegister(RegB) && + assert(MRegisterInfo::isVirtualRegister(RegB) && "Shouldn't consider two physregs!"); return !mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA); } @@ -775,7 +775,7 @@ bool LiveIntervals::overlapsAliases(const LiveInterval *LHS, } LiveInterval LiveIntervals::createInterval(unsigned reg) { - float Weight = MRegisterInfo::isPhysicalRegister(reg) ? + float Weight = MRegisterInfo::isPhysicalRegister(reg) ? (float)HUGE_VAL :0.0F; return LiveInterval(reg, Weight); } diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 175b5fd7c1..94380ff542 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -1,12 +1,12 @@ //===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the LiveVariable analysis pass. For each machine // instruction in the function, this pass calculates the set of registers that // are immediately dead after the instruction (i.e., the instruction calculates @@ -98,7 +98,7 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB, assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!"); #endif - assert(MBB != VRInfo.DefInst->getParent() && + assert(MBB != VRInfo.DefInst->getParent() && "Should have kill for defblock!"); // Add a new kill entry for this basic block. @@ -156,7 +156,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // physical register. This is a purely local property, because all physical // register references as presumed dead across basic blocks. // - PhysRegInfo = (MachineInstr**)alloca(sizeof(MachineInstr*) * + PhysRegInfo = (MachineInstr**)alloca(sizeof(MachineInstr*) * RegInfo->getNumRegs()); PhysRegUsed = (bool*)alloca(sizeof(bool)*RegInfo->getNumRegs()); std::fill(PhysRegInfo, PhysRegInfo+RegInfo->getNumRegs(), (MachineInstr*)0); @@ -171,7 +171,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { "Cannot have a live-in virtual register!"); HandlePhysRegDef(*I, 0); } - + // Calculate live variable information in depth first order on the CFG of the // function. This guarantees that we will see the definition of a virtual // register before its uses due to dominance properties of SSA (except for PHI @@ -195,7 +195,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // Unless it is a PHI node. In this case, ONLY process the DEF, not any // of the uses. They will be handled in other basic blocks. - if (MI->getOpcode() == TargetInstrInfo::PHI) + if (MI->getOpcode() == TargetInstrInfo::PHI) NumOperandsToProcess = 1; // Loop over implicit uses, using them. @@ -247,7 +247,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), E = MBB->succ_end(); SI != E; ++SI) { MachineBasicBlock *Succ = *SI; - + // PHI nodes are guaranteed to be at the top of the block... for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end(); MI != ME && MI->getOpcode() == TargetInstrInfo::PHI; ++MI) { @@ -267,7 +267,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { } } } - + // Finally, if the last block in the function is a return, make sure to mark // it as using all of the live-out values in the function. if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) { @@ -305,7 +305,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // function. If so, it is due to a bug in the instruction selector or some // other part of the code generator if this happens. #ifndef NDEBUG - for(MachineFunction::iterator i = MF.begin(), e = MF.end(); i != e; ++i) + for(MachineFunction::iterator i = MF.begin(), e = MF.end(); i != e; ++i) assert(Visited.count(&*i) != 0 && "unreachable basic block found"); #endif diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 695ba13a49..ee8da6744e 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -133,7 +133,7 @@ void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { } void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { - std::vector<MachineBasicBlock *>::iterator I = + std::vector<MachineBasicBlock *>::iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred); assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); Predecessors.erase(I); diff --git a/lib/CodeGen/MachineCodeEmitter.cpp b/lib/CodeGen/MachineCodeEmitter.cpp index 248b06a999..3037cba297 100644 --- a/lib/CodeGen/MachineCodeEmitter.cpp +++ b/lib/CodeGen/MachineCodeEmitter.cpp @@ -1,10 +1,10 @@ //===-- MachineCodeEmitter.cpp - Implement the MachineCodeEmitter itf -----===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements the MachineCodeEmitter interface. @@ -35,7 +35,7 @@ namespace { std::cout << "\n--- End of stub for Function\n"; return 0; } - + void emitByte(unsigned char B) { std::cout << "0x" << std::hex << (unsigned int)B << std::dec << " "; } @@ -62,14 +62,14 @@ namespace { MachineCodeEmitter &MCE; unsigned counter; unsigned values[4]; - + public: FilePrinterEmitter(MachineCodeEmitter &M, std::ostream &os) : o(os), MCE(M), counter(0) { openActual(); } - - ~FilePrinterEmitter() { + + ~FilePrinterEmitter() { o << "\n"; actual.close(); } @@ -101,7 +101,7 @@ namespace { void *finishFunctionStub(const Function *F) { return MCE.finishFunctionStub(F); } - + void emitByte(unsigned char B) { MCE.emitByte(B); actual << B; actual.flush(); diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index d49a1ddb4b..a93ebc88ec 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -256,7 +256,7 @@ void MachineFunction::clearSSARegMap() { /// CreateStackObject - Create a stack object for a value of the specified type. /// int MachineFrameInfo::CreateStackObject(const Type *Ty, const TargetData &TD) { - return CreateStackObject((unsigned)TD.getTypeSize(Ty), + return CreateStackObject((unsigned)TD.getTypeSize(Ty), TD.getTypeAlignment(Ty)); } diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 3dce6fc85d..0351cc2783 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1,10 +1,10 @@ //===-- MachineInstr.cpp --------------------------------------------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // Methods common to all machine instructions. @@ -28,7 +28,7 @@ using namespace llvm; // Global variable holding an array of descriptors for machine instructions. // The actual object needs to be created separately for each target machine. // This variable is initialized and reset by class TargetInstrInfo. -// +// // FIXME: This should be a property of the target so that more than one target // at a time can be active... // @@ -112,7 +112,7 @@ bool MachineInstr::OperandsComplete() const { /// replace - Support for replacing opcode and operands of a MachineInstr in /// place. This only resets the size of the operand vector and initializes it. /// The new operands must be set explicitly later. -/// +/// void MachineInstr::replace(short opcode, unsigned numOperands) { assert(getNumImplicitRefs() == 0 && "This is probably broken because implicit refs are going to be lost."); @@ -178,7 +178,7 @@ MachineInstr::substituteValue(const Value* oldVal, Value* newVal, { assert((!defsOnly || !notDefsAndUses) && "notDefsAndUses is irrelevant if defsOnly == true."); - + unsigned numSubst = 0; // Substitute operands @@ -236,7 +236,7 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo, static void print(const MachineOperand &MO, std::ostream &OS, const TargetMachine *TM) { const MRegisterInfo *MRI = 0; - + if (TM) MRI = TM->getRegisterInfo(); bool CloseParen = true; @@ -250,7 +250,7 @@ static void print(const MachineOperand &MO, std::ostream &OS, OS << "%hm("; else CloseParen = false; - + switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: if (MO.getVRegValue()) { @@ -333,21 +333,21 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { // be attached to a Machine function yet if (TM) OS << TM->getInstrInfo()->getName(getOpcode()); - + for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { const MachineOperand& mop = getOperand(i); if (i != StartOp) OS << ","; OS << " "; ::print(mop, OS, TM); - + if (mop.isDef()) if (mop.isUse()) OS << "<def&use>"; else OS << "<def>"; } - + // code for printing implicit references if (getNumImplicitRefs()) { OS << "\tImplicitRefs: "; @@ -361,7 +361,7 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { OS << "<def>"; } } - + OS << "\n"; } @@ -381,7 +381,7 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { // Otherwise, print it out in the "raw" format without symbolic register names // and such. os << TargetInstrDescriptors[MI.getOpcode()].Name; - + for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) { os << "\t" << MI.getOperand(i); if (MI.getOperand(i).isDef()) @@ -390,13 +390,13 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { else os << "<d>"; } - + // code for printing implicit references unsigned NumOfImpRefs = MI.getNumImplicitRefs(); if (NumOfImpRefs > 0) { os << "\tImplicit: "; for (unsigned z = 0; z < NumOfImpRefs; z++) { - OutputValue(os, MI.getImplicitRef(z)); + OutputValue(os, MI.getImplicitRef(z)); if (MI.getImplicitOp(z).isDef()) if (MI.getImplicitOp(z).isUse()) os << "<d&u>"; @@ -405,7 +405,7 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { os << "\t"; } } - + return os << "\n"; } @@ -418,7 +418,7 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) { OS << "%hh("; else if (MO.isLoBits64()) OS << "%hm("; - + switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: if (MO.hasAllocatedReg()) @@ -479,10 +479,10 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) { assert(0 && "Unrecognized operand type"); break; } - + if (MO.isHiBits32() || MO.isLoBits32() || MO.isHiBits64() || MO.isLoBits64()) OS << ")"; - + return OS; } diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp index 0010ccd7e6..6790b3f7b0 100644 --- a/lib/CodeGen/PHIElimination.cpp +++ b/lib/CodeGen/PHIElimination.cpp @@ -1,10 +1,10 @@ //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass eliminates machine instruction PHI nodes by inserting copy @@ -97,12 +97,12 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { while (MBB.front().getOpcode() == TargetInstrInfo::PHI) { // Unlink the PHI node from the basic block, but don't delete the PHI yet. MachineInstr *MPhi = MBB.remove(MBB.begin()); - + assert(MRegisterInfo::isVirtualRegister(MPhi->getOperand(0).getReg()) && "PHI node doesn't write virt reg?"); unsigned DestReg = MPhi->getOperand(0).getReg(); - + // Create a new register for the incoming PHI arguments const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg); unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC); @@ -112,7 +112,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // into the phi node destination. // RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC); - + // Update live variable information if there is any... if (LV) { MachineInstr *PHICopy = prior(AfterPHIsIt); @@ -128,7 +128,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // of any registers, or if the value itself is dead, we need to move this // information over to the new copy we just inserted. // - std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator> + std::pair<LiveVariables::killed_iterator, LiveVariables::killed_iterator> RKs = LV->killed_range(MPhi); std::vector<std::pair<MachineInstr*, unsigned> > Range; if (RKs.first != RKs.second) // Delete the range. @@ -154,13 +154,13 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) { MachineOperand &opVal = MPhi->getOperand(i-1); - + // Get the MachineBasicBlock equivalent of the BasicBlock that is the // source path the PHI. MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock(); MachineBasicBlock::iterator I = opBlock.getFirstTerminator(); - + // Check to make sure we haven't already emitted the copy for this block. // This can happen because PHI nodes may have multiple entries for the // same basic block. It doesn't matter which entry we use though, because @@ -171,7 +171,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // register we are interested in! // bool HaveNotEmitted = true; - + if (I != opBlock.begin()) { MachineBasicBlock::iterator PrevInst = prior(I); for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) { @@ -180,7 +180,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { if (MO.isDef()) { HaveNotEmitted = false; break; - } + } } } @@ -215,7 +215,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(), E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) { MachineBasicBlock *SuccMBB = *SI; - + // Is it alive in this successor? unsigned SuccIdx = SuccMBB->getNumber(); if (SuccIdx < InRegVI.AliveBlocks.size() && @@ -223,7 +223,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { ValueIsLive = true; break; } - + // Is it killed in this successor? for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) if (InRegVI.Kills[i]->getParent() == SuccMBB) { @@ -235,7 +235,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { if (!ValueIsLive) ValueIsLive = VRegPHIUseCount[SrcReg] != 0; } - + // Okay, if we now know that the value is not live out of the block, // we can add a kill marker to the copy we inserted saying that it // kills the incoming value! @@ -252,7 +252,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { } } } - + // Really delete the PHI instruction now! delete MPhi; } diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp index 4d2f111b2e..525bd3a9ec 100644 --- a/lib/CodeGen/Passes.cpp +++ b/lib/CodeGen/Passes.cpp @@ -1,10 +1,10 @@ //===-- Passes.cpp - Target independent code generation passes ------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines interfaces to access the target independent code diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 109724f937..f54be3b97f 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -1,10 +1,10 @@ //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass is responsible for finalizing the functions frame layout, saving @@ -190,7 +190,7 @@ void PEI::calculateCallerSavedRegisters(MachineFunction &Fn) { void PEI::saveCallerSavedRegisters(MachineFunction &Fn) { // Early exit if no caller saved registers are modified! if (RegsToSave.empty()) - return; + return; const MRegisterInfo *RegInfo = Fn.getTarg |